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SiGa

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SiGa last won the day on November 21 2019

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About SiGa

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  1. I found the culprit. int sc_main(int argc, char** argv) { sc_vector< sc_signal<int, SC_MANY_WRITERS > > stub_vec("top_stub", 5); sc_vector< sc_signal<TraceVector, SC_MANY_WRITERS > > sim_vec("top_sim_", 5); mA SC_NAMED(modA); mB SC_NAMED(modB); modA.A(stub_vec[0]); modB.A(stub_vec[0]); sc_trace_file *tf = sc_create_vcd_trace_file("traces"); if (!tf) { cout << "Empty TraceFile could not be generated." << endl; } // sc_trace(tf, &stub_vec[0], "yolo"); // <-- debug assertion! sc_trace(tf, s
  2. Thanks for pointing out that I missed filling the vector in the default constructor. This reminds me, that I initialized my sc_signal<TraceVector...> with a TraceVector containing all 0. Which probably caused the non-default constructor to be used. Fix for default constructor: // CTOR TraceVector() { vec.reserve(4); vec.push_back(0); vec.push_back(0); vec.push_back(0); vec.push_back(0); } If I comment out the complete TraceVector part of my code and just have my mA and mB, even then I get the same error. It also can't be because of an empty trace file. I tried it
  3. I am debugging a problem with my custom datatype for sc_trace. I use my datatype for sc_signal, which is inside a sc_vector. Then I trace each signal inside the sc_vector. To narrow down my problem I removed all unnecessary parts for debugging. I still get the error, even though I'm not tracing a single signal. My MWE: main.cpp: // SystemC_FirstTest.cpp : Defines the entry point for the console application. // #pragma once //#define WIN32_LEAN_AND_MEAN //needed for tcp (winsock, ws2) #include <systemc.h> #include "globals.h" SC_MODULE(mA) { sc_inout
  4. I used sc_spawn a lot for generating processes at runtime. Is there a similar way to spawn a signal? As I understand SystemC, a signal is the data type and the port of a module is a pointer to the datatype. So it should be possible to create them at runtime or not? Why do I need it? I have a given module that has a varying set of ports and I want to attach and connect these ports with signals dynamically. Best regards and thanks in advance, SiGa
  5. SC_MODULE(DF_Fork){ sc_fifo_in<int> input; sc_fifo_out<int> output1,output2; void process(){ while(1){ int value = input.read(); output1.write(value); //output1.write(value); output2.write(value); } } SC_CTOR(DF_Fork) {SC_THREAD(process);} }; You never write on output2. Your printer then remains at value = input.read(); since it waits till data is available. Thus the simulation has nothing to do and stops itself. You can read about sc_fifo methods here: http://www.asic-world.com/systemc/channels4.html
  6. I have to correct my statements. It works they way I described it, I unintentionally looked at the wrong trace signals...
  7. Thank you for the explanation, I changed it. To prove your statement I tried it with a static integer, and it is traced correctly. About the remaining bugs, regarding dangling references. Only private member of my class is private: std::vector<int> vec; Access methods return ref to vec or store elements of passed argument inside the local ref, by copying. I added an exception for invalid vector size, to avoid reallocation of vector and thus dangling references. const std::vector<int>& read() const { return vec; } void write(std::vector<int
  8. Are you missing the function prototype in the "Cnt_time.h" class ? Or does the parameter list not match with what you implemented in "Cnt_time.cpp"? Btw you for loop wont work like this. A few suggestions. for (int i = 0; i < 20; i++) { wait(20, SC_SEC); cout << i << endl; cout << "INFO: Time is " << sc_time_stamp() << "!" << endl; }
  9. When I add the 'const' keyqord to the reference parameter it works. void sc_trace(sc_trace_file* tf, const TraceList& var, const std::string& nm); // works Additionally I had to change my read method. // Old std::list<int>& read() { return lst; } // New const std::list<int>& read() const { return lst; } I could not trace the values of a list, even when the size of the list remained constant. So I tried it with a vector and created TraceVector. The size of the vector will be 4. There are some size checks missing to ensure this, but that'
  10. @Eyck Thank you for the hint. Now that I know it, I also saw that it was done that way in the book, and I didn't spot the closing curly bracket. My overloaded sc_trace function is only matched correctly, when I don't use a ref for the TraceList argument. void sc_trace(sc_trace_file* tf, TraceList& var, const std::string& nm); // doesn't work void sc_trace(sc_trace_file* tf, TraceList var, const std::string& nm); // works Compiler output for not working case: 1>c:\users\xx\xx\xx\systemc-2.3.3\src\sysc\communication\sc_signal_ports.h(307): error C2665: 'sc_trace':
  11. Hello Forum, I want to have std::list<int> as type for a sc_port and sc_signal. In the e-book "SystemC : From The Ground Up" and "IEEE Std 1666™-2011" I found the necessary information. So I created a wrapper class that implements the necessary overloaded operators, and the sc_trace function that are needed for this purpose. // List that is traceable by sc_trace class TraceList { private: std::list<int> lst; public: // Methods for accessing list std::list<int>& read() { return lst; } void write(std::list<int> var) {
  12. I have a class with an sc_event which should be readable and writeable through getter and setter methods. class IntWithEvent { private: sc_event _ev_wr; sc_event _ev_trigger; public: const sc_event& get_write_event() const { return _ev_wr; } const sc_event& get_trigger_event() const { return _ev_trigger; } void set_trigger_event(sc_event &ev) const { _ev_trigger = ev; // E0349 no operator "=" matches these operands } } Writing the getters was no problem. However the setter throws me an error of no matching assignment operator. Do I need to
  13. Thank you Philipp, this solved my runtime errors. I also removed if_inputs/-outputs as parents for the monitor class, since I nested them into stub and sim. class monitor : public sc_module { ... }; _________________________________ Thank you for the explanation and the provided examples. Now I know two ways of solving my problem. Your solution seems to have lesse overhead, or is the same with Phlipp's solution? Philipp's way lets me have inputs and outputs in the same scope when I connect signals to the ports in the main.cpp. Which fits my modeling style more. I
  14. I'm trying to use this approach for my problem. I created a header with two classes as you mentioned. Then I inherit them into the module where I want the "port bundle" to be. I get a lot of these Warnings: "Warning: (W505) object already exists: monitor.R_OP_MODE. Latter declaration will be renamed to monitor.R_OP_MODE_0 In file: c:\xx\xx\xx\xx\systemc-2.3.3\src\sysc\kernel\sc_object_manager.cpp:153" And one error, which probably causes the abortion. Error: (E109) complete binding failed: port not bound: port 'monitor.T_PRESET_MANUAL' (sc_inout) In file: c:\xx\xx
  15. Thank you for the suggestions. In the end I upgraded my project to c++17 and stored lambda functions with a variant as parameter. When I need to create a delayed stimulus I spawn a SC_THREAD function that takes the function pointer, a delay and a variant as parameter. In the spawned function I wait for the delay and then call the function pointer and pass the variant as argument. #pragma once #include <systemc.h> #include <map> typedef std::variant< bool, unsigned int > value_types; typedef std::function< void(value_types) > func_ptr_type; typedef std::map <std:
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