Jump to content

Nitin_S

Members
  • Content Count

    9
  • Joined

  • Last visited

About Nitin_S

  • Rank
    Member

Recent Profile Visitors

The recent visitors block is disabled and is not being shown to other users.

  1. Thanks @Eyck @maehne and @David Black for your replies. All yours solutions and advices really help for my understanding. Thanks again 🙂 Best Regards, Nitin_S
  2. Thanks @Eyck and @David Black for the answer. I understood it's not possible. As Eyck told, "main() comes with the SystemC reference implementation (SystemC simulator) and initializes the simulation kernel." Just out of curiosity why we can't do it again. Even if we did sc_stop which will stop the simulation, and clears the memory, why init is not possible after that?. If you think this is irrelevant question, you can ignore , just for my understanding and learning the concepts I asked this. You can direct me to the section of LRM I can read. Best Regards, Nitin
  3. Hi all, I was trying something different and came across a issue which looks odd to me. I have a main function and from there I am calling sc_main(). In sc_main, I am starting and ending simulation < sc_start, sc_stop >. something like Example : int main(){ sc_main() //gives the expected output sc_main() // creashes Error: insert module failed: elaboration done return 0 } I am expecting that my simulation should run 2 times. But, I am facing " ERROR- insert module failed: elaboration done " while calling 2nd sc_main. ---Its seems like the old simulation is itself not getting cleared---- As after doing sc_stop the simulation should stops and clears all memories, then I believe it should have worked. --Can any help me to make this done, if possible-- Any hint will be very helpful for me. Thanks in advance :). Best Regards, Nitin
  4. Hello all, This is very basic question and I know its not possible, but still I need to put some delay or wait in start of simulation/end of elaboration. I will give you the background, In end of elaboration i an initializing the value to a pin, and that pin is quite required for reset vector address. In start of simulation I am opening my gdb, which which stop at my reset vector address, but it seems the gdb is not updating the reset vector value, so I need a small delay. Is it possible? Any suggestion will be very helpful :) Thanks and Regards, Nitin_s
  5. Hi All, This is regarding to TLM 2.0 topic is Temporal Decoupling in LT modeling and b_transport delay parameter. My first query is what is the need of passing delay in b-transport call. I read from the below link http://forums.accellera.org/topic/110-b-transport-interface/#entry426 it says Nitin S -> I am considering there is no wait and it is said that, if there is not wait then the execution will be completed without consuming time in slave. So, then why we are passing the delay? So, what is the use of As we know that in LT model we give least priority to time factor so why we need " b_transport as representing a protocol with only two timing points, the time at which the request is sent, and the time at which the response is received"??? Note all bold letter are written in quote are from "http://forums.accellera.org/topic/110-b-transport-interface/#entry426" Thanks and Regards, Nitin S
×
×
  • Create New...