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ralph.goergen

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  1. Thanks
    ralph.goergen got a reaction from haase in Compiler error: using is_reset() with sc_signal<bool> in sc_signal.h   
    Hi.
    The is_reset method is private. So, you cannot call it on an object.
    But why are you using is_reset() method? What do you want to achieve?
    This is not part of the standard API, i.e. it might be dangerous to use.
    Greetings
    Ralph
     
  2. Thanks
    ralph.goergen got a reaction from Padma vathi in Events notifications and wait for events   
    Hi. 
     
    The never ending wait may be caused by race conditions. 
     
    a) Notify with no argument means immediate notification. I.e., all processes sensitive to this event are made runnable in the same delta cycle. This may lead to non-deterministic behavior and should be used with care. 
     
    Notify means all processes sensitive to this event are made runnable. The process in your case is sensitive to the event when its execution reaches the wait instruction. When the notify instruction is executed before the wait instruction is reached, no process is sensitive to the event. Event notifications are not stored for later waits. 
    Assume the following example:
    p1(){ wait(ev1); cout << "wait done"; } p2(){ ev1.notify(); } When p1 starts first, it executes until wait is reached. Then p1 is suspended and p2 continues. The notification of ev1 is executed, p1 is made runnable again, and the message is printed. 
    When p2 starts first, the notification of ev1 is done without any process waiting. Hence, it has no effect. Then p1 is started. It reaches the wait statement and will wait forever because the event notification has been executed before. No message will occur. 
    Since SystemC contains no guaranty about the order in which processes runnable in the same delta cycle are executed, a model like the example leads to non-deterministic behavior. 
     
    Greetings
    Ralph
  3. Like
    ralph.goergen got a reaction from dilawar in can't instantiate sub-modules using vector `port not bound` error   
    Hi.
     
    This is because an unbound port cannot be read.
    A port forwards all read and write calls to the actual interface (signal) it is bound to. In you module constructor, you are still in the model set up and elaboration phase. The port is not yet bound to any signal. Hence, you cannot read from it. Accessing ports should not be done befor end-of-elaboration.
     
    Greetings
    Ralph
  4. Like
    ralph.goergen got a reaction from maehne in Delta Cycle and concurrency   
    Hi.
    Maybe you should have a look at SystemC AMS. It offers the TDF (timed data flow) model of computation. It follows the data flow concept, i.e. you have a cluster of blocks; the solver defines an order of evaluation of each block; and in every time step, the blocks (or modules) are evaluated in that order. The output of one block is immediately visible at the input of the following block.
    Greetings
    Ralph
  5. Like
    ralph.goergen got a reaction from maehne in How to drive DUT clock and reset signal in UVM-SystemC?   
    Hi.
    This seems to be related to SystemC in general and not to UVM.
    sc_start() - without argument - starts the simulation until there is no activity anymore. No activity means no more events in the event queue. sc_clock generates new events all the time because the value changes independent from everything else in your design. As a result, the event queue will never be empty and the simulation never stops.
    (For completemess: the simulation ends as well when the maximum time is reached, i.e. the maximum time value that can be represented by sc_time).
    Normally, there are two ways to stop simulation, either by calling sc_start with a argument or by calling sc_stop.
    The first has been mentioned already by AmeyaVS. It runs the simulation for the given time and stops.
    The second can be done for instance from a testbench thread, e.g. from a sequencer when all sequences are done.
     
    Greetings
    Ralph
  6. Thanks
    ralph.goergen got a reaction from noay in Transaction Data Pointer   
    Hi.
    Normally the initiator is considered as owner of the payload, i.e. he should take care of allocating and de-allocating it.
    The target should decide how to use the data. If the target wants to keep it/store it, the target should make a copy of the data. In that sense, the transaction is completed when b_transport returns because the initiator transfered it to the target and the target had a chance to handle it.
    A benefit of this is that you do not need dynamic allocation of the buffer buf.
     
    Greetings
    Ralph
  7. Like
    ralph.goergen got a reaction from maehne in What is the scope of dont_initialize()?   
    Hi.
    Ameya is right.
    See SystemC LRM (ieee1666) Section 5.2.15: 
    [...] it is associated with the most recently created process instance [...]
    I.e.: ONE process created most recently before calling dont_initialize is not execute.
    BTW: No process is executed in the constructor. But all processes, that are not marked as dont_initialize, are evaluated once at simulation start.
     
    Greetings
    Ralph
  8. Like
    ralph.goergen got a reaction from AmeyaVS in What is the scope of dont_initialize()?   
    Hi.
    Ameya is right.
    See SystemC LRM (ieee1666) Section 5.2.15: 
    [...] it is associated with the most recently created process instance [...]
    I.e.: ONE process created most recently before calling dont_initialize is not execute.
    BTW: No process is executed in the constructor. But all processes, that are not marked as dont_initialize, are evaluated once at simulation start.
     
    Greetings
    Ralph
  9. Like
    ralph.goergen got a reaction from AmeyaVS in SystemC-2.3.1a clang build fail   
    Hi.
    There seems to be a problem with the '#if defined' expressions.
    MSYS gcc and clang define _WIN32, and in combination with using pthreads, SC_USE_PTHREADS is defined as well.
    Could you please evaluate possible fixes? E.g. adding  '!defined(SC_USE_PTHREADS)' in line 33 of sc_cor_fiber.h?
    And could you please try with the public review version of SystemC 2.3.2 as well (http://www.accellera.org/downloads/drafts-review)?
    If this works, I can try to forward the issue to the SystemC developer working group.
    Greetings
    Ralph
  10. Like
    ralph.goergen got a reaction from maehne in SystemC-2.3.1a clang build fail   
    Hi.
    There seems to be a problem with the '#if defined' expressions.
    MSYS gcc and clang define _WIN32, and in combination with using pthreads, SC_USE_PTHREADS is defined as well.
    Could you please evaluate possible fixes? E.g. adding  '!defined(SC_USE_PTHREADS)' in line 33 of sc_cor_fiber.h?
    And could you please try with the public review version of SystemC 2.3.2 as well (http://www.accellera.org/downloads/drafts-review)?
    If this works, I can try to forward the issue to the SystemC developer working group.
    Greetings
    Ralph
  11. Like
    ralph.goergen got a reaction from AmeyaVS in collect trasactions from different threads at any given time   
    How about using delta cycles? Their main reason is to bring determinism into concurrent systems.
    When you notify the event for the next delta cycle with e.notify(sc_core::SC_ZERO_TIME), then it will definitely see all transactions that happened in this delty cycle.
    Greetings
    Ralph
  12. Like
    ralph.goergen got a reaction from AmeyaVS in passing size value of sc_fifo in sc_vector   
    Hi.
    If you want to pass arguments to the constructor of the elements of an sc_vector, you need a custom creator. See SystemC LRM IEEE:1666 Section 8.5.5 for details and examples.
    A very easy way to realize custom creator by using a Lambda function is presented here:
    https://www.researchgate.net/publication/284731273_Automated_SystemC_Model_Instantiation_with_Modern_C_Features_and_sc_vector
     
    Greetings
    Ralph
  13. Like
    ralph.goergen got a reaction from PARVINDER PAL SINGH in Imeediate notification error   
    Hi.
     
    'Unfortunately', there is no randomness in the execution order of processes within the same delta cycle.
    http://forums.accellera.org/topic/5052-accellera-kernel-process-order/#entry12122
     
    When the two threads start at the same time and have the same period, they will run always in the same order. This is part of the SystemC implementation and cannot be changed without changing the SystemC kernel. There are some approaches about this, patches for the SystemC kernel to add randomness in the execution order, but I do not know the current status of them.
    E.g.:
    http://www.teisa.unican.es/HetSC/downloads/SC_kernel_Improvements/uc_rand_sched/Patch_Kernel_sc_pseudorandom_sched_Eng.pdf
     
    If you do not communicate via signal and you do not have dependencies on the delta cycle, you can move the execution of the threads to the next delta cycle by adding a 'wait(SC_ZERO_TIME)' and execute in random cases.
     
    Greetings
    Ralph
  14. Like
    ralph.goergen got a reaction from maehne in vector of vector of SystemC objects   
    Dear Manu,
     
    SystemC objects are not CopyConstructable and not CopyAssignable, both required for for std::vector. 
    This is why you cannot use std::vector and the main reason for sc_vector.
    More benefits are vector based port binding, ...
     
    Greetings
    Ralph
  15. Like
    ralph.goergen got a reaction from rtmc in How should I design multiple writers?   
    Hi,
     
    SystemC tries to preserve you from implementing undefined behaviour as much as possible. There is an option to allow multiple writers but, in general, this is not what you want.
    If two processes write to a signal or fifo in the same delta cycle, the order of write accesses is not deterministic.
    In your case, there are several options:
    Writing your own channel, e.g. a bus model.
    Writing some kind of de-multiplexer.
    ...
     
    In all cases, you have to think about what happens if more than one process tries to access the component conrurrently. And you have to define some kind of order between the input ports or a communication protocol.
     
    Greetings
    Ralph
  16. Like
    ralph.goergen got a reaction from maehne in Array of Ports   
    Hi.
     
    First of all: We are talking about the model construction and elaboration phase here (instantiating components and binding ports). In general, the simulation phase is the way more performance critical part and not the elaboration.
     
    To your question:
    sc_object and all derived classes are not default constructible and copyable. So: it is the port itself and not the array.
    If you want to instantiate an array of sc_ports or a std::vector of sc_ports, you need to assign actual values (i.e. sc_port objects) to the individual members of the array or vector. To do so, you would need to copy sc_port objects and this is not allowed.
    (In fact, this is somehow possible in C++14, but not in an easy and convenient way.)
     
    Regarding performance:
    There is no significant overhead of sc_vector and it is all in the elaboration phase. You will not be able to measure any slow-down. 
     
    Greetings
    Ralph
  17. Like
    ralph.goergen got a reaction from sumit_tuwien in Naming of ports which inherits sc_signal/in/outs   
    Hi, 
     
    not sure if this is what you are searching for but how about the following:
    template < typename T > class my_sig_type : public sc_core::sc_signal<T> { typedef sc_core::sc_signal<inner_type> base_type; my_sig_type(const char * name) : base_type(name) {} }; Greetings
    Ralph
  18. Like
    ralph.goergen got a reaction from stzog in Build errors   
    'To disable deprecation, use _CRT_SECURE_NO_WARNINGS.'
     
    Have you tried this?
  19. Like
    ralph.goergen got a reaction from maehne in Naming of ports which inherits sc_signal/in/outs   
    Hi, 
     
    not sure if this is what you are searching for but how about the following:
    template < typename T > class my_sig_type : public sc_core::sc_signal<T> { typedef sc_core::sc_signal<inner_type> base_type; my_sig_type(const char * name) : base_type(name) {} }; Greetings
    Ralph
  20. Like
    ralph.goergen got a reaction from sumit_tuwien in Passing maps within Constructors in SystemC struct   
    Why are you using C arrays? How about vector or map?
     
    e.g.:
    std::vector< std::vector< uint64_t > >
     
    What do you mean with 'simulation stops'?
    Did the simulation end? Is there any error message?
     
    The code posted above does not show any processes. Maybe you can post a bit more (minimum working example)?
     
    Greetings
    Ralph
  21. Like
    ralph.goergen got a reaction from VKrishnamurthy in Passing maps within Constructors in SystemC struct   
    Hi.
     
    You can write your own constructor (see section 5.2.6 in the SystemC LRM IEEE-1666).
    SC_MODULE(M) { M(sc_module_name n, int a, int : sc_module(n) {} ... }; Please note that you have to add SC_HAS_PROCESS to your module if it contains any process and ont uses the SC_CTOR macro.
     
    Greetings
    Ralph
  22. Like
    ralph.goergen got a reaction from maehne in SystemC - Inconsistent result   
    Hi,
     
    from SystemC 2.3.0 to SystemC 2.3.1, part of the internal list handling for threads has changed. This can lead to a different execution order of threads runable in the same delta cycle.
    In general, the execution order of threads in a single delta cycle is undefined in SystemC and models should not rely on this order. When running the same model twice with the same simulator, the order should be the same. But in different simulators the order may differ.
     
    Could this be the cause of the difference in your case?
     
    If not, could you strip down your example to a minimum (showing the difference but easier to understand)?
     
    Greetings
    Ralph
  23. Like
    ralph.goergen got a reaction from Pruthvi015 in Does ports like sc_in<> follow request-update thing?   
    Hi.
     
    Yes. A port does not hold a value. Whenever you access a port (read or write) you actually access the channel or signal bound to it. So, the port behaves like that signal.
    (But you should not write to an input port )
     
    Greetings
    Ralph
  24. Like
    ralph.goergen got a reaction from David Black in Does ports like sc_in<> follow request-update thing?   
    Hi.
     
    Yes. A port does not hold a value. Whenever you access a port (read or write) you actually access the channel or signal bound to it. So, the port behaves like that signal.
    (But you should not write to an input port )
     
    Greetings
    Ralph
  25. Like
    ralph.goergen got a reaction from Philipp A Hartmann in Does ports like sc_in<> follow request-update thing?   
    Hi.
     
    Yes. A port does not hold a value. Whenever you access a port (read or write) you actually access the channel or signal bound to it. So, the port behaves like that signal.
    (But you should not write to an input port )
     
    Greetings
    Ralph
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