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Everything posted by wilson_on

  1. Is clock(signal from rtl or from testbench) allow to be used in C program to trigger event or delay?
  2. Hi, I am new to Python and I have been asked to build a UVM testbench which can call Python functions. Is there any way that I can do which is similar to DPI-C for C functions in verilog testbench? If you can provide a detail example, that would be great. Thanks.
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