-
Content Count
27 -
Joined
-
Last visited
-
Days Won
1
basarts last won the day on February 26 2019
basarts had the most liked content!
About basarts
-
Rank
Member
Recent Profile Visitors
583 profile views
-
student4K reacted to a post in a topic: Running "Hello SystemC": assertion `m_references_n != 0' failed
-
Verifying SystemC model with Verilog/SV testbench
basarts replied to Nithin's topic in SystemC Language
In addition, if your SystemC model contains ports of type double, you need to convert them in the test harness to 64 bit vectors first. -
Running "Hello SystemC": assertion `m_references_n != 0' failed
basarts replied to student4K's topic in SystemC Language
On a side note, you might also consider moving to SystemC 2.3.3; SystemC 2.3.1 is fairly old. -
I guess the return value reflects either successful (zero) or non-successful (non-zero). E.g. the following code prints a non-zero value (in my case, 256 although I would have expected 1): module foo; int val; initial begin val = $system("test -f thisfileprobablydoesnotexist"); $display(val); end endmodule
-
Error when initiating a transaction indirectly from a C source file
basarts replied to davidbp13's topic in SystemC Language
If you separate application code and read/write implementation code, you can keep your C code application and compile it still for your CPU module. Yes, you will need a C++ compiler then, but it also allows you to port your application to e.g. a commercial CPU model which could use plain C. You'd only need to replace your read/write C++ implementation with a C implementation. // C header file #ifndef C_H #define C_H #ifdef __cplusplus extern "C" { #endif /* __cplusplus */ void mywrite(uint32_t address, uint32_t value); void myread (uint32_t address, uint32_t *value); #ifdef __cplusplus -
Example Makefile to run uvm-systemc
basarts replied to reethu's topic in SystemC Verification (UVM-SystemC, SCV)
What errors do you get? From your question, it is not clear whether you have errors related to your (UVM-)SystemC installation, your Makefile, your application or something else. -
The freely available SCML library from Synopsys provides a way to describe registers with optional callback functions that will trigger when a register read or write occurs.
- 1 reply
-
- events
- register model
-
(and 1 more)
Tagged with:
-
Parametrized Constructor for UVM system-C test
basarts replied to vkc1020's topic in SystemC Verification (UVM-SystemC, SCV)
You could use an optional command line parameter to sc_main and propagate that to the "real" test. -
How to run the uvm-systemc by command
basarts replied to DavidLai's topic in SystemC Verification (UVM-SystemC, SCV)
You also need to include -I, -L and -l for uvm-systemc in your compilation. -
Forget that last post, it seems that brackets etc. are not displayed in the posts.
-
I guess you need some extra changes: firnodes = new FirNode(...) firnodes->data_in(...) accu->mul_in(mul_sig) etc.