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R_C

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Posts posted by R_C

  1. hi All,

    I am trying to compile UVM-SC in linux (gcc version 4.1.2, SUSE Linux Enterprise Desktop 11 SP4) but it fails at 'gmake check' with the below error:

    ----------------------------------------------------------------------

    sc_main.cpp:(.text._ZN3top11build_phaseERN3uvm9uvm_phaseE[top::build_phase(uvm::uvm_phase&)]+0x29): undefined reference to `std::basic_ostream<char, std::char_traits<char> >& std::__ostream_insert<char, std::char_traits<char> >(std::basic_ostream<char, std::char_traits<char> >&, char const*, long)'
    ../../src/uvmsc/.libs/libuvm-systemc.so: undefined reference to `std::basic_ostream<char, std::char_traits<char> >& std::basic_ostream<char, std::char_traits<char> >::_M_insert<void const*>(void const*)'
    ../../src/uvmsc/.libs/libuvm-systemc.so: undefined reference to `std::basic_ostream<char, std::char_traits<char> >& std::basic_ostream<char, std::char_traits<char> >::_M_insert<double>(double)'
    ../../src/uvmsc/.libs/libuvm-systemc.so: undefined reference to `std::basic_ostream<char, std::char_traits<char> >& std::basic_ostream<char, std::char_traits<char> >::_M_insert<unsigned long>(unsigned long)'
    collect2: ld returned 1 exit status
    gmake[3]: *** [simple/callbacks/basic/test] Error 1
    gmake[3]: Leaving directory `/SystemC/UVMC/uvm-systemc-1.0-beta2/objdir/examples/uvmsc'
    gmake[2]: *** [check-am] Error 2
    gmake[2]: Leaving directory `/SystemC/UVMC/uvm-systemc-1.0-beta2/objdir/examples/uvmsc'
    gmake[1]: *** [check-recursive] Error 1
    gmake[1]: Leaving directory `/SystemC/UVMC/uvm-systemc-1.0-beta2/objdir/examples'
    gmake: *** [check-recursive] Error 1
     

    ----------------------------------------------------------------------

    Any idea what could be missing here? similar undefined messages are present in log befoe the collect2 ld error as well, not sure which symbols are missing.

     

    Thanks

    RC

  2. Thanks Bas, response to questions is posted below:

    • Which interfaces does the DUT have? 

               Multiple interfaces with standard AMBA and a couple of others (non-standardized)

    • What is the complexity of the DUT?

               Relatively complex, most of the operations are predefined and have a standard task to be performed

    • Do you need a register model? yes
    • Does the DUT contain mixed signal functionality? no
    • What kind of test scenarios do you envision? Directed / constrained-random? both 
    • Do you build the testbench from scratch or are you reusing verification components / tests? - from scratch
    • Do you plan to reuse the tests and/or testbench in other environments, like HDL simulations or in a validation/lab environment? 

                SystemC model yes, testbench yes (as much as possible)

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