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HenkNep

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  1. Hi Alan, Many thanks, I hacked my code as per the Doulos examples and it seems to work fine. Time to start studying abstract/pure/vtable/virtual/Fluent/... general C++ OO stuff... Here is the code: #include <systemc.h> class write_if : virtual public sc_interface { public: virtual void write_reg(int) = 0; virtual void write_attrib(bool) = 0; protected: write_if(){}; private: write_if (const write_if&); // disable copy write_if& operator= (const write_if&); // disable }; class read_if : virtual public sc_interface { public: virtual const int& read_reg() = 0; virtual const bool& read_attrib() = 0; protected: read_if(){}; private: read_if (const read_if&); // disable copy read_if& operator= (const read_if&); // disable }; class des_struct : public sc_prim_channel,public write_if,public read_if { public: explicit des_struct(int reg_=1, bool attrib_=false) : sc_prim_channel(sc_gen_unique_name("des_struct")) { reg=reg_; attrib=attrib_; } void write_reg(int c) { // blocking write reg=c; request_update(); } void write_attrib(bool a) { // blocking write attrib=a; request_update(); } const int& read_reg() { return(reg); } const bool& read_attrib() { return(attrib); } protected: int reg; bool attrib; }; des_struct dinx(0,true); dinx.write_reg(1); cout << "Result dinx : " << dinx.read_reg() << endl; Thanks.
  2. Hi Philipp/Dakupoto, Many thanks for the answers, the Fluent API solution works great. Can I clarify that one can create user defined data types for sc_signal but you cannot add any methods. The reason being that it requires modification of the OSCI library? If a user wants to create a custom sc_signal with additional methods one has to: 1) Create a new abstract interface class write_if : virtual public sc_interface { public: virtual void write_reg(int) = 0; }; 2) Create a channel which implements the new interface //class my_signal : public sc_prim_channel,public write_if { class my_signal : public sc_channel,public write_if { public: virtual void write_reg(int value) { reg=value; request_update(); } private: int reg; } 3) Instantiate the new signal as if it were a module my_signal xyz; xyz.write_reg(4); Am I on the right track? I tried some simple code which resulted in a tsunami of error messages... Thanks.
  3. Hi All, A basic C++ question, how can I add a method to the class below so that I can write to individual elements? sc_signal<class des_struct> xyz,abc; abc.write(xyz.read()); // works fine xyz.attrib=4; // Error class des_struct { public: uint16_t reg; uint16_t attrib; des_struct() { reg=0; attrib=0; } des_struct& operator= (const des_struct& rhs) { reg=rhs.reg; attrib=rhs.attrib; return *this; } .... }; Thanks.
  4. Hi All, I am bit confused about the following dout result: sc_out<sc_int<8> > dout; sc_int<8> din1=0x80; sc_uint<4> din2=0x9; dout.write(din1 % din2); dout=5; I know that I am mixing sizes and signed/unsigned but I am intrigued what causes the result to be 5. I was expecting either -128%9=-2 (or -128%-7=-2). If din1 is reduce to 4 bits then I would expected -1%9=-1 or 0. Thanks.
  5. Hi, I have a simple tri-state output signal sc_out<sc_logic> ctrlout; If I write to it directly compilation fails: ctrlout.write('Z'); // fails The same applies to using a variable: sc_logic local='Z'; // fails The only one that works is: sc_logic local; local='Z'; ctrlout.write(local); Do I really have to jump through so many hoops to assign a tri-state value to an output port? I then found an example on the web which uses resolved types, even though I only have 1 driver the resolved type works: sc_out_rv<1> out; out.write('Z'); Am I correct in stating that even for a single driver I need to use the _rv types? I also noticed that _resolved has the same issues, that is you cannot assign 'Z' directly. Thanks for any advice.
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