Jump to content


  • Content Count

  • Joined

  • Last visited

About weber

  • Rank

Profile Information

  • Gender
    Not Telling
  • Location
    Palo Alto, CA, USA

Recent Profile Visitors

938 profile views
  1. Hello Ankit, The active alternate register in the component implementation is selected by an alternateGroup. An alternateGroup is considered actively selecting an alternateRegisters due to an unspecified combination of port values, register values, memory values, or other component internal state values which can change value while the component implementation is running. An alternateGroup does not change the component implementation. Both scenarios you mention could be supported by the IP-XACT alternateRegister feature. Some examples: 1. The alternateGroup activation combin
  2. Hello UshaKumi, It would be better to describe the register bit positions without a field specification to be "unspecified" instead of "reserved". The word "reserved" does not have a specific agreed meaning in the industry, and, the register bit positions without a field specification could have many different software behaviors or hardware implementations. Also, these bit position could be actual fields which the IP provider has chosen exclude from the IP-XACT file. If your tool flow requires that every bit in a register be associated with a field you can always ask the IP file provide
  3. Hello hbhatia, The first line is the XML declaration and not the IP-XACT declaration. The file is XML version 1.0 and encoded with the ISO-8859-1 character encoding. The version of IP-XACT would be in the namespace declaration on the first XML tag which may be preceded by comments. The following example has the namespace declaration corresponding to IEEE 1685-2014 IP-XACT on the ipxact:component tag on the last line: <?xml version="1.0" encoding="UTF-8" ?> <!-- --> <!-- Generated by Semifore, Inc. cs
  4. Hello Balasubramanian, Many languages support multi-dimensional arrays of objects including System Verilog and IP-XACT. However, I was hoping that you would provide a reference to a standard or a programming language which specifies the offset layout of the array in memory and includes the multiple stride feature you are requesting. Our concern is that this multiple stride feature would not translate to the expected derived outputs of IP-XACT especially those for the software community. Also, IP-XACT is not an authoring format. You should be using a tool to generate the IP-XACT to reso
  5. Hello Chris, IP-XACT is actually two committees. First, there is the Accellera IP-XACT committee. I believe participation is limited to Accellera members, but, check with the chair of the committee. Second, there is the IEEE P1685 committee which is entity based. Participation is limited to entity (company, university, government) members of the IEEE Standards Association. The next version of IP-XACT is worked on by the Accellera committee first and then the result is contributed to the IEEE P1685 committee for refinement and eventual publication. Once published by the IEEE P1685 comm
  6. Hello Balasubramanian, The word you are looking for is "stride". Stride is the offset distance between elements of an array. IP-XACT 1685-2009 does not have a stride feature. Due lack of participation and resources for the forthcoming IP-XACT version (hopefully 2014) the stride feature has been deferred until the committee reconvenes for the subsequent version. We look forward to your participation. In general an array is an indexed sequential collection of identical elements. Stride is one property which is assumed identical between array elements. The second example violates this as
  • Create New...