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Martin Borja

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Everything posted by Martin Borja

  1. Hi All, I have a question regarding the proper placement of the following code for raising an objection in a multi-layered testbench (i.e. virtual sequencer -> virtual sub sequencer -> sub sequencer): <start snip> virtual task pre_start(); if(starting_phase != null) starting_phase.raise_objection(get_sequencer()); endtask <end snip> I have tested the physical sequences and they work when no virtual sequences are involved. With that isolated, I introduced the 2 virtual sequences and since the new default_sequence is the top virtual sequence, I placed a raise_objection there. Here is a summary of my trial runs: 1) Pure physical sequence as default_sequence - raise_objection at physical sequence (works); 2) Top virtual sequnce as default_sequence - raise_objection added to virtual sequence's pre_start (does not work); What happens to 2) is the top virtual sequence does not end but the sub sequences do not run either. Please shed some light on why this is happening and possible ways to fix this. Thanks, Martin
  2. Thank you for your response. It is #2 that's happening. I have a raise and drop objection in the physical sequence's pre_start() and post_start() tasks and the condition fails so does not happen. What happens after is main ends right away. Am I correct in placing the raise_objection and drop_objection in the physical sequence? If so, how come it does not satisfy starting_phase != null when the code is running? Thanks, Martin
  3. Hi bhunter1972, Thanks for your input. Regarding the comma in: It is a typographical error, my bad. When running the code, I see the top virtual sequence, virtual sub sequence and physical sequence start (based on uvm_infos printed out). The problem though happens once inside main_phase. The simulation halts with messages saying there is no default sequence (tool is VCS synopsys) as if the default_sequence was not set as in the above quote. I also checked the handles and they are very much complete per hierarchy. Any light into this is much appreciated. Thanks, Martin
  4. Hello Everyone, I am trying to control a sub virtual sequencer's non-virtual sub sequencers using a top level virtual sequencer. It looks like this diagram. <start of diagram> .------------------------------------------------------. | my_test | .--------------------------------------------------. | | | sequences | | | '--------------------------------------------------' | | .--------------------------------------------------. | | | my_env | | | '--------------------------------------------------' | '/----------------------------------------------------\' / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ .----------------------------------------------------------------------------------------------------. | my_env | | .------------------------. | | | my_virtual_sequencer | | | '------------------------' | | .-----------------------------------. .----------------------------. .---------------------------. | | | sub_virtual_agent | | sub_agent_a | | sub_agent_b | | | | .-------------------------------. | | .------------------------. | | .-----------------------. | | | | | sub_virtual_sequencer | | | | sub_sequencer_a | | | | sub_sequencer_b | | | | | '-------------------------------' | | '------------------------' | | '-----------------------' | | | | .-------------------------. | | .------------------------. | | .-----------------------. | | | | | sub_agent_3 | | | | driver_a | | | | driver_b | | | | | .-------------------------. | | | '------------------------' | | '-----------------------' | | | | | sub_agent_2 | | | | .------------------------. | | .-----------------------. | | | | .---------------------------. | | | | | monitor_a | | | | monitor_b | | | | | | sub_agent_1 | | | | | '------------------------' | | '-----------------------' | | | | | .-----------------------. | | | | '----------------------------' '---------------------------' | | | | | sub_sequencer_1 | | | | | | | | | '-----------------------' | | | | | | | | .-----------------------. | | | | | | | | | driver_1 | | | | | | | | | '-----------------------' | | | | | | | | .-----------------------. | | | | | | | | | monitor_1 | | |-' | | | | | '-----------------------' |-' | | | | '---------------------------' | | | '-----------------------------------' | '----------------------------------------------------------------------------------------------------' <end of diagram> I am trying to apply section 4.8 Virtual Sequences of uvm users guide. But I think I am missing on something. I have a top level virtual sequence that has the top level virtual sequencer as its p_sequencer. I have this in the macro: `uvm_declare_p_sequencer(my_virtual_sequencer) And then I have this in the task body() to access the sub sequencer of the sub virtual sequencer: `uvm_do_on(sub_sequence_1, p_sequencer.i_sub_virtual_sequencer.i_sub_sequencer_1); sub_sequence_1 is a physical sequence. Is this correct under the UVM standard? If not, how do I properly control i_sub_sequencer_1? This is how I access it in the test build_phase: uvm_config_db #(uvm_object_wrapper)::set(this, "i_my_env,i_my_virtual_sequencer.main_phase","default_sequence",my_virtual_sequence::type_id::get()); Any help/inputs to this is much appreciated. Thanks, Martin
  5. Hi, I have a somewhat similar problem though it's more about the use of virtual sequencers to control both non-virtual and virtual sequencers. I created a post that you could follow with this link: http://forums.accellera.org/topic/1356-how-to-use-virtual-sequencers-to-control-both-non-virtual-sub-sequencers-and-virtual-sub-sequencers/?hl=%2Bvirtual+%2Bsequencer I look forward to your inputs guys. Thanks, Martin
  6. Hello Everyone, Good day. I am creating a testbench that has a structure shown below and am encountering errors perhaps due to the multi-layered virtual sequencer controlling both non-virtual sub sequencers and a virtual sub sequencer. Config's not shown. <start of diagram> .------------------------------------------------------. | my_test | | .--------------------------------------------------. | | | sequences | | | '--------------------------------------------------' | | .--------------------------------------------------. | | | my_env | | | '--------------------------------------------------' | '/----------------------------------------------------\' / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ .----------------------------------------------------------------------------------------------------. | my_env | | .------------------------. | | | my_virtual_sequencer | | | '------------------------' | | .-----------------------------------. .----------------------------. .---------------------------. | | | sub_virtual_agent | | sub_agent_a | | sub_agent_b | | | | .-------------------------------. | | .------------------------. | | .-----------------------. | | | | | sub_virtual_sequencer | | | | sub_sequencer_a | | | | sub_sequencer_b | | | | | '-------------------------------' | | '------------------------' | | '-----------------------' | | | | .-------------------------. | | .------------------------. | | .-----------------------. | | | | | sub_agent_3 | | | | driver_a | | | | driver_b | | | | | .-------------------------. | | | '------------------------' | | '-----------------------' | | | | | sub_agent_2 | | | | .------------------------. | | .-----------------------. | | | | .---------------------------. | | | | | monitor_a | | | | monitor_b | | | | | | sub_agent_1 | | | | | '------------------------' | | '-----------------------' | | | | | .-----------------------. | | | | '----------------------------' '---------------------------' | | | | | sub_sequencer_1 | | | | | | | | | '-----------------------' | | | | | | | | .-----------------------. | | | | | | | | | driver_1 | | | | | | | | | '-----------------------' | | | | | | | | .-----------------------. | | | | | | | | | monitor_1 | | |-' | | | | | '-----------------------' |-' | | | | '---------------------------' | | | '-----------------------------------' | '----------------------------------------------------------------------------------------------------' <end of diagram> 1) my_base_sequence (from w/c my_sequence_1 is extend) <start snip> class my_base_sequence extends uvm_sequence #(my_sequence_item); `uvm_object_utils(my_base_sequence) `uvm_declare_p_sequencer(sub_sequencer_1) function new (string name ="my_base_sequence"); super.new(name); endfunction virtual task pre_start(); if(get_parent_sequence() == null && starting_phase != null) starting_phase.raise_objection(get_sequencer()); else `uvm_error(get_type_name(), "starting_phase is null") endtask virtual task post_start(); if(get_parent_sequence() == null && starting_phase != null) starting_phase.drop_objection(get_sequencer()); endtask endclass <end snip> 2) my_virtual_sequence <start snip> class my_virtual_sequence extends uvm_sequence; my_sequence_1 i_my_sequence_1; `uvm_object_utils(my_virtual_sequence) `uvm_declare_p_sequencer(my_virtual_sequencer) virtual task body(); `uvm_do_on(i_my_sequence_1, p_sequencer.i_sub_virtual_sequencer.i_sub_sequencer_1); endtask endclass <end snip> 3) my_virtual_sequencer <start snip> class my_virtual_sequencer extends uvm_sequencer; sub_virtual_sequencer i_sub_virtual_sequencer; sub_sequencer_a i_sub_sequencer_a; sub_sequencer_b i_sub_sequencer_b; `uvm_component_utils(my_virtual_sequencer) function new (string name = "my_virtual_sequencer", uvm_component parent = null); super.new(name, parent); endfunction function void build_phase(uvm_phase phase); super.build_phase(phase); i_sub_virtual_sequencer = sub_virtual_sequencer::type_id::create("i_sub_virtual_sequencer",this); i_sub_sequencer_a = sub_sequencer_a::type_id::create("i_sub_sequencer_a",this); i_sub_sequencer_b = sub_sequencer_b::type_id::create("i_sub_sequencer_b",this); endfunction endclass <end snip> 4) my_env <start snip> class my_env extends uvm_env; my_virtual_sequencer i_my_virtual_sequencer; sub_virtual_agent i_sub_virtual_agent; sub_agent_a i_sub_agent_a; sub_agent_b i_sub_agent_b; `uvm_component_utils(my_env); extern function new (string name = "my_env", uvm_component parent = null); extern function void build_phase (uvm_phase phase); extern function void connect_phase (uvm_phase phase); endclass function my_env::new(string name = "my_env",uvm_component parent = null); super.new(name, parent); endfunction function void my_env::build_phase(uvm_phase phase); super.build_phase(phase); i_sub_virtual_agent = sub_virtual_agent::type_id::create("i_sub_virtual_agent",this); uvm_config_db #(uvm_object_wrapper)::set(this, "i_sub_virtual_agent.i_sub_virtual_sequencer.i_sub_sequencer_1.main_phase","default_sequence",null); uvm_config_db #(uvm_object_wrapper)::set(this, "i_sub_virtual_agent.i_sub_virtual_sequencer.i_sub_sequencer_2.main_phase","default_sequence",null); uvm_config_db #(uvm_object_wrapper)::set(this, "i_sub_agent_a.i_sub_sequencer_a.main_phase", "default_sequence",null); uvm_config_db #(uvm_object_wrapper)::set(this, "i_sub_agent_b.i_sub_sequencer_b.main_phase", "default_sequence",null); endfunction function void my_env::connect_phase(uvm_phase phase); super.connect_phase(phase); i_my_virtual_sequencer.i_sub_virtual_sequencer.i_sub_sequencer_1 = i_sub_virtual_agent.i_sub_virtual_sequencer.i_sub_sequencer_1; i_my_virtual_sequencer.i_sub_virtual_sequencer.i_sub_sequencer_2 = i_sub_virtual_agent.i_sub_virtual_sequencer.i_sub_sequencer_2; i_my_virtual_sequencer.i_sub_virtual_sequencer.i_sub_sequencer_3 = i_sub_virtual_agent.i_sub_virtual_sequencer.i_sub_sequencer_3; i_my_virtual_sequencer.i_sub_sequencer_a = i_sub_agent_a.i_sub_sequencer_a; i_my_virtual_sequencer.i_sub_sequencer_b = i_sub_agent_a.i_sub_sequencer_b; endfunction <end snip> 5) my_test <start snip> class my_test extends uvm_test; my_env i_my_env; `uvm_component_utils(my_test) extern function new (string name = "my_test",uvm_component parent = null); extern function void build_phase (uvm_phase phase); endclass function my_test::new(string name = "my_test", uvm_component parent = null); super.new(name, parent); endfunction function void my_test::build_phase(uvm_phase phase); super.build_phase(phase); i_my_env = my_env::type_id::create("i_my_env",this); uvm_config_db #(uvm_object_wrapper)::set(this, "i_my_env,i_my_virtual_sequencer.main_phase","default_sequence",my_virtual_sequence::type_id::get()); endfunction <end snip> The result of this test run is as follows: <start snip> UVM_ERROR /some_path/my_sequence_lib.sv(693) @400000 : uvm_test_top.i_my_env.i_sub_virtual_agent.i_sub_agent_1.i_sub_sequencer_1@@my_virtual_sequence.i_sub_sequence_1 [my_virtual_sequence] starting_phase is null . . . UVM_INFO /cad_tools_path/F-2011.12-SP1/etc/uvm/base/uvm_phase.svh(1233) @400000 : reporter [PH_READY_TO_END] Phase 'uvm.uvm_sched.main' (id=2956) PHASE READY TO END <end snip> And then it ended w/o running the sub_sequence_1. The UVM_ERROR above shows that it was unable to get the raise.objection part to run. Any help/inputs to this is much appreciated. Thanks, Martin
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