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Showing content with the highest reputation on 12/06/2013 in all areas

  1. 1 point
    Hello Geniuses, in my ADC design, I have a output signal "eoc" (end of conversion), I declared it in port declaration like below sca_tdf::sca_de::sca_out<sc_dt::sc_logic> eoc; In processing function, when I assign it a value '1' like below eoc = '1'; I get following error message A2D.cpp: In member function ‘virtual void a2d_nbit::processing()’: A2D.cpp:50: error: invalid conversion from ‘char’ to ‘sc_dt::sc_logic_value_t’ A2D.cpp:50: error: initializing argument 1 of ‘sc_dt::sc_logic::sc_logic(sc_dt::sc_logic_value_t)’ I also tried to initialize "eoc" in Initialize function like eoc.initialize('1'); but then my compiler gives me another error as follows A2D.cpp: In member function ‘virtual void a2d_nbit::initialize()’: A2D.cpp:28: error: invalid conversion from ‘char’ to ‘sc_dt::sc_logic_value_t’ A2D.cpp:28: error: initializing argument 1 of ‘sc_dt::sc_logic::sc_logic(sc_dt::sc_logic_value_t)’ could you please suggest me how can initialize and assign sc_dt::sc_logic port ? thanks in advance, Milind.
  2. 1 point
    amitk3553

    destruct objects

    Hello, I have to reset the fifo, I was doing like that cmd_fifo.nb_read(Flush), currently need to read each location to reset the whole fifo, So I want to know is there any method like cmd_fifo.reset() or we can destroy the object as done below? sc_fifo<int> cmd_fifo; SC_CTOR() { host_hci_tar_socket.register_b_transport(this, (&hci_top::PI_decode)); } void PI_decode() { if(value==1) { ~cmd_fifo(); //destructor } } I used destructor like above but its not working, so suggest something about this. Regards cam
  3. 1 point
    amitk3553

    Pass Parameter

    Hello, In comments there are questions, answer please...Actually I have to pass parameter from the top. #define test testcase_001 //have to pass parameter, is this right way? #include "testcases/test.cpp" //could I pass parameterized value here? class hci_test { public: unsigned char* host_hci_pkt_arr; unsigned int address; test test_case; //could I make object handle like this(using parameter here)?? hci_test() //constructor { host_hci_pkt_arr = new(nothrow) unsigned char [20]; host_hci_pkt_arr[0] = test_case.host_hci_pkt_arr[0]; host_hci_pkt_arr[1] = test_case.host_hci_pkt_arr[1]; } }; After compilation compiler throwing errors :2nd line: error: testcases/test.cpp: No such file or directory :9th line: error: ISO C++ forbids declaration of ‘testcase_001’ with no type :9th line: error: ISO C++ forbids declaration of ‘test_case’ with no type and when I comment first line of code and in 2nd and 9th line, instead of test, I write testcase_001, then it works fine means problem is in passing value from the top. So let me know the corrections required in it if any or some other way to achieve this kind of passing parameters or values from the top, as #define is just used for aliasing or can do the work like parameter? Please respond Thanks cam
  4. 1 point
    amitk3553

    SystemC fifo

    Hello, i had used fifo in systemC in following way sc_fifo<int> cmd_fifo; //fifo decleration in constructor hci_top(sc_module_name nm):sc_module(nm), cmd_fifo(buffer_size) its showing no compilation errros but i want its depth like 20, and buffer size of each location of 8 bits(1 byte). Is there something we cannot change the default value of depth 16 of sc_fifo? How it would be possible? i also done in following way, but its not working sc_fifo<int depth> cmd_fifo(buffer size); Regards cam
  5. 1 point
    Hello, I want to make a server module that outputs a user defined class through sc_fifo and I'm not sure if that is possible. So far, I have this Server module header ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------- #include <systemc.h> #include "Gaze.h" #include "ImageObjects.h" #include "Image.h" #include "iostream.h" #include "fstream.h" #include "string.h" #include <sstream> SC_MODULE(Server) { //PORTS FOR SERVER sc_in_clk clk; //Clock sc_in<sc_uint<8> > check; //Signal for client to request new image sc_port<sc_fifo_in<Gaze >> inClient; // input from client sc_port<sc_fifo_out<Image >> output; //output to client void sendImage(sc_uint<8> img); //Function to send image to client std::vector<Image> getImages(); //Takes in annotation files and saves them as images //Local data structures std::vector<Image> ImageBuffer; SC_CTOR(Server) { SC_METHOD(sendImage); sensitive << check; } }; ------------------------------------------------------------------------------------------------------------------------------------------------------------------------ Would "sc_port<sc_fifo_out<Image >> output;" that line of code work? Image is just a class I created in c++ ------------------------------------------------------------------------------------------------------------------------------------------------------------------------ #include "ImageObjects.h" #include <vector> class Image : public sc_interface { public: int imageNumber; std::vector<ImageObjects> obj; Image(int i, std::vector<ImageObjects> ob); //void setImage(int, Objects[]); virtual Image returnImage(); }; --------------------------------------------------------------------------------------------------------------------------------------------- Thanks for all the help!
  6. 1 point
    This is AVM (Advanced Verification Methodology) from Mentor Graphics. This is the only MMM... for SystemC. Could someone please tell that this library is still supported by mentor or not? AVM_3-2 (Cook Book is also included): http://depositfiles.com/files/0k2qh7eni
  7. 1 point
    I'm new to SystemC and I have problem with signal assignment. I defined a new data type "digit" : class digit { public: sc_uint<4> dt; ///////constructor///////// digit (sc_uint<4> d=0) { dt=d; } digit& operator =(const digit& d) { dt=d.dt; return(*this); } } here is the code I tried to assign a signal which is in digit type digit t1(3); sc_signal <digit> d1; d1.write(t1); I also tried d1=t1 (operator= is overloaded in class digit) but signal d1 does not take the value of t1 would you pleas help me?
  8. 1 point
    Hello All, I am modeling A2D that uses a successive approximation algorithm. I have modeled A2D converter in SystemC and SystemC-AMS. But both of the models give me some errors. SC model ends up with infinite loop, and SC-AMS model ends with segmentation fault the models are as follows: SC models: Location of the while loop could be the serious problem. I have tried changing the location in side switch statement, but error persists. //error message: stage 1: start edge stage 1: start edge stage 1: start edge stage 1: start edge stage 1: start edge stage 1: start edge stage 1: start edge ...... infinite loop // SC_A2D.h #include<systemc.h> enum adc_state {input, convert}; SC_MODULE(A2D_module) { sc_in_clk clk; sc_in_clk start; sc_in<double> ain; sc_out<sc_logic> eoc; sc_out<sc_lv<8> > dout; sc_signal <adc_state> status; void conversion_logic(); // void next_state_logic(); SC_CTOR(A2D_module) { SC_CTHREAD(conversion_logic, start.pos()); } }; //SC_A2D.cpp #include <SC_A2D.h> void A2D_module::conversion_logic() { eoc = SC_LOGIC_0; dout = "00000000"; double thresh, Vtemp; sc_lv<8> dtemp; int bit_cnt = 8; status = input; while(bit_cnt > 0) { switch (status){ cout << "begin !!!"; case input: if (start == 1) { cout << "stage 1: start edge" << endl; thresh = 5.0; Vtemp = ain; eoc = SC_LOGIC_0; status = convert; } break; case convert: if (clk == 1) { cout << "stage 2: clk edge" << endl; thresh = thresh/2.0; if (Vtemp > thresh) { cout << "stage 3: Vtemp > thresh" << endl; dtemp[bit_cnt]= '1'; Vtemp = Vtemp- thresh; } else { dtemp[bit_cnt]= '0'; } if (bit_cnt > 0) { cout << "stage 4: bit_cnt > 0" << endl; bit_cnt = bit_cnt - 1; } else { cout << "last stage: conversion" << endl; dout = dtemp; status = input; wait(10, SC_US); eoc = SC_LOGIC_1; } } break; } // end switch } // end while } // end method conversion_logic ------------------------------------------------------------------------------------------------------------- SC-AMS models: which gives segmentation fault // Error message: stage 1: Read Input stage 3: Convert Input stage 1: Read Input stage 2 : start edge stage 3: Convert Input stage 4: clk edge !!! bit_cnt = 7 stage 1: Read Input stage 3: Convert Input stage 1: Read Input stage 3: Convert Input stage 4: clk edge !!! Segmentation fault // A2D.h #include <systemc-ams> #include <systemc> #include <stdio.h> using namespace std; //ref: VHDL-AMS Model of A2D converter given in System designer's guide to VHDL-AMS on page 287 SCA_TDF_MODULE (a2d_nbit) { //port declaration sca_tdf::sca_in<double> ain; // analog input pin sca_tdf::sca_de::sca_in<bool> clk; //clock signal sca_tdf::sca_de::sca_in<bool> start; //clock signal sca_tdf::sca_de::sca_out<sc_dt::sc_logic> eoc; //end of conversion pin sca_tdf::sca_de::sca_out<sc_dt::sc_lv<8> > dout; //digitalized output a2d_nbit(sc_core::sc_module_name nm, double Vmax_ = 5.0, double delay_ = 10.0e-6, int bit_range_ = 8, bool start_x_ = 0, bool clk_x_ = 0): ain("ain"), start("start"),clk("clk"), eoc("eoc"), dout("dout"), Vmax(Vmax_), delay(delay_), bit_range(bit_range_), start_x(start_x_), clk_x(clk_x_){} void set_attributes() { set_timestep(50, sc_core::SC_US); eoc.set_delay(1); } void initialize() { eoc.initialize(sc_dt::SC_LOGIC_0); } void processing(); private: double delay; // ADC conversion time double Vmax; int bit_range; bool clk_x; bool start_x; }; // A2D.cpp void a2d_nbit :: processing() { // double Vin = ain.read(); double thresh; //Threshold to test input voltage double Vtemp; //snapshot of input voltage when conversion starts sc_dt::sc_lv<8> dtemp; //temparary output data enum state {input, convert}; int bit_cnt; state status = input; switch(status) // ref: systemC state machine example in SystemC user guide on page 171 { case input : cout << "stage 1: Read Input" << endl; if((start == true) && (start_x == false)) //if (start == true) { cout << "stage 2 : start edge" << endl; bit_cnt = bit_range; thresh = Vmax; Vtemp = ain; eoc = sc_dt::sc_logic('0'); } case convert: cout << "stage 3: Convert Input" << endl; if ((clk == true) && (clk_x == false)) //if (clk == true) { cout << "stage 4: clk edge !!!" << endl; thresh = thresh/2.0; if (Vtemp > thresh) { dtemp[bit_cnt]= '1'; Vtemp = Vtemp - thresh; } else { dtemp[bit_cnt]= '0'; } if (bit_cnt > 0) { bit_cnt = bit_cnt - 1; cout << " bit_cnt = " << bit_cnt << endl; } else { dout = dtemp; eoc = sc_dt::sc_logic('1'); status = input; } break; } default: break; } // end switch start_x = start; clk_x = clk; } ---------------------------------------------------------------------------------------------------------------- // voltage source: dummy_source.h #include<systemc-ams> #include<systemc> #include<iostream.h> #include<fstream.h> using namespace std; SCA_TDF_MODULE (dummy_src) { // sca_tdf::sca_de::sca_out<double> output; sca_tdf:: sca_out<double> output; ifstream infile; double val; dummy_src(sc_core::sc_module_name): output("output"){} void set_attributes() { set_timestep(50, sc_core::SC_US); infile.open("datalog.txt"); } void processing () { if (infile >> val) { output.write(val); } else { output.write(0.0); } } }; ------------------------------------------------------------------------------------------------------------- // top_level_entity : interface.h #include<systemc-ams> #include<systemc> #include<A2D.h> //#include<SC_A2D.h> #include<dummy_source.h> using namespace std; using namespace sc_core; SC_MODULE (interface2) { // A2D_module a2d; a2d_nbit a2d; dummy_src input_vtg; sc_core::sc_clock clk1; sc_core::sc_clock start1; SC_CTOR(interface2) :in("in"), out("out"), a2d("a2d"), input_vtg("input_vtg"), clk1("clk1", 100, sc_core::SC_US, 0.5), start1("start1", 200, sc_core::SC_US, 0.5), eoc("eoc") { input_vtg.output(in); a2d.ain(in); a2d.start(start1.signal()); a2d.clk(clk1.signal()); a2d.eoc(eoc); a2d.dout(out); } public: // sc_core::sc_signal <double> in; sca_tdf::sca_signal<double> in; sc_core::sc_signal<sc_dt::sc_lv<8> > out; sc_core::sc_signal<sc_logic> eoc; }; // top_level_entity: interface2.cpp #include<systemc-ams.h> #include<systemc.h> #include<iomanip> #include<interface2.h> int sc_main(int argc, char* argv[]) { interface2 if2_dut("if2_dut"); sca_util :: sca_trace_file* atfs = sca_util :: sca_create_tabular_trace_file("if2.dat"); sca_util :: sca_trace(atfs, if2_dut.clk1, "\tCLK"); sca_util :: sca_trace(atfs, if2_dut.start1, "\tSTART"); sca_util :: sca_trace(atfs, if2_dut.in, "\tINPUT"); sca_util :: sca_trace(atfs, if2_dut.out, "\tOUTPUT"); sca_util :: sca_trace(atfs, if2_dut.eoc, "\tEOC"); sc_start(400, SC_US); sca_util :: sca_close_tabular_trace_file (atfs); return 0; } -------------------
  9. 1 point
    I have the following code: class Top : public sc_core::sc_module{public:... sc_port<tlm::tlm_fifo_get_if<tlm::tlm_generic_payload*> > read_pTx; sc_port<tlm::tlm_fifo_put_if<tlm::tlm_generic_payload*> > write_pTx;... private: mysubmodule *pmysubmodule;} class mysubmodule: public sc_core::sc_module{public: ... sc_port<tlm::tlm_fifo_get_if<tlm::tlm_generic_payload*> > read_pTx; sc_port<tlm::tlm_fifo_put_if<tlm::tlm_generic_payload*> > write_pTx; ... } In Top constructor: SC_HAS_PROCESS(Top);Top::Top(...){pmysubmodule = new mysubmodule(...);pmysubmodule->read_pTx(read_pTx);pmysubmodule->write_pTx(write_pTx);} It compliles well. But when I run the test, I got Segmentation fault error at line: pmysubmodule->write_pTx(write_pTx); In debug tool, it shows that it stops at void sc_port_base::bind( this_type& parent_ ) { if( m_bind_info == 0 ) { // cannot bind a parent port after elaboration report_error( SC_ID_BIND_PORT_TO_PORT_, "simulation running" ); } ... } Does anyone know why and how to fix it? Thanks a lot!
  10. 1 point
    How to output "float (double)" from sc_fixed type class using sc_trace? I have an existing model (all in floating point design, using "sc_signal<double>"), and am trying to convert it to its fixed point one (i.e. using sc_signal<sc_fixed< ,,,, > >"). sc_signal<double> ch_a; sc_signal<sc_fixed<16,8, SC_RND, SC_SAT> > ch_a_fix; sc_trace(tf, ch_a, "ch_a" ); // floating point channel tracing, it traces signal in "double". sc_trace(tf, ch_a_fix, "ch_a_fix ); // fixed point channel tracing: it traces signal in "integer numbers". The question is, how can I trace the sc_fixed type class (sc_signal<sc_fixed<...:> >) in floating point numbers? For waveform viewer-wise, I'm using gtkwave for now. I have found one posting that has the same question that I have now. But it doesn't have any replies there. http://www.accellera.org/Discussion_Forums/helpforum/archive/msg/msg?list_name=help_forum&monthdir=200802&msg=msg00035.html Many thanks in advance.
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