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Showing content with the highest reputation on 04/19/2013 in all areas

  1. 1 point
    If you want to add "missing" features into a SV testbench, it can be very easy using DPI, provided you know basic C/C++ syntax. For example, here is a version of your double task that takes an open array (assumed here to be a packed bit vector of any length). I haven't included any checking/error handling but even so, this should still be OK for up to 32-bit vectors. #include "svdpi.h" extern "C" { int double_vec (svOpenArrayHandle h) { svBitVecVal *ptr; int size; int value; size = svSize(h,0); //get bit vector ptr from handle ptr = (svBitVecVal*)svGetArrayPtr(h); //convert to int value = bv_to_int(ptr,size); value *= 2; //write int back to bv int_to_bv(value,ptr,size); return 0; } } The functions to convert to/from int/bit vector could be something like: int bv_to_int(const svBitVecVal* bv, int size) { int val = 0; int mask = 1; for (int i=0; i<size; i++){ if (svGetBitselBit(bv,i) == sv_1) val |= mask; mask <<= 1; } return val; } void int_to_bv (int val, svBitVecVal* bv, int size) { int mask = 1; svBit b; for (int i=0; i<size; i++){ b = (val & mask) ? sv_1 : sv_0; svPutBitselBit(bv,i,; mask <<= 1; } } You could declare and use the DPI function in SV as follows: module top(); import "DPI-C" task double_vec(inout bit[] vec); bit [7:0] vec8 = 8'd15; bit [15:0] vec16 = 16'd1234; initial begin $display ("vec8 = %0d, vec16 = %0d", vec8, vec16); double_vec(vec8); double_vec(vec16); $display ("vec8 = %0d, vec16 = %0d", vec8, vec16); end endmodule: top With simple uses of DPI such as this, most current SV simulators will automatically compile and link the SV and C/C++ code for you, e.g. qverilog top.sv double.cpp Hope that gives you some ideas, even if it is a somewhat more complicated solution than you were hoping for! Regards, Dave
  2. 1 point
    If you require to be unaware of the width of your vector, you can use this: doubler #($bits(A))::double(A); Yes, its quite a verbose (and ugly) syntax, but on the other hand, VHDL is quite verbose (and ugly ) as well... Regarding SV lacking this feature - well, it does make sense to me, at least when considering simulators performance (static vs. dynamic arrays, optimization, etc...) On the other hand, the language does enable you to use dynamic arrays. Moreover, you may quite easily convert them to packed vectors with the streaming operator.
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