Jump to content

Leaderboard

Popular Content

Showing content with the highest reputation on 04/19/2013 in all areas

  1. If you want to add "missing" features into a SV testbench, it can be very easy using DPI, provided you know basic C/C++ syntax. For example, here is a version of your double task that takes an open array (assumed here to be a packed bit vector of any length). I haven't included any checking/error handling but even so, this should still be OK for up to 32-bit vectors. #include "svdpi.h" extern "C" { int double_vec (svOpenArrayHandle h) { svBitVecVal *ptr; int size; int value; size = svSize(h,0); //get bit vector ptr from handle ptr = (svBitVecVal*)svGetArrayPtr(h); //conv
    1 point
  2. If you require to be unaware of the width of your vector, you can use this: doubler #($bits(A))::double(A); Yes, its quite a verbose (and ugly) syntax, but on the other hand, VHDL is quite verbose (and ugly ) as well... Regarding SV lacking this feature - well, it does make sense to me, at least when considering simulators performance (static vs. dynamic arrays, optimization, etc...) On the other hand, the language does enable you to use dynamic arrays. Moreover, you may quite easily convert them to packed vectors with the streaming operator.
    1 point
×
×
  • Create New...