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UVM Simulator Specific Issues

Use this forum to discuss tool-specific usage and flow issues.

172 topics in this forum

  1. uvm-1.2 example compile error

    By u24c02,
    • 1 reply
    • 710 views

  2. Cadence: Incisive Enterprise Simulator vs. Incisive Unified Simulator - difference?

    By ljepson74,   
    • 1 reply
    • 8,988 views

  3. VCS running multiple top modules - simulate just one?

    By cliffc,   
    • 1 reply
    • 4,104 views

  4. UVM connect 2.2 kit on vcs. SC and SV can't work together?

    By ethanli,
    • 1 reply
    • 3,902 views

  5. TCL in RivieraPro

    By c4brian,
    • 1 reply
    • 1,089 views

  6. Two top moudles in vcs? but sYsTeMcToP always run.

    By ethanli,
    • 1 reply
    • 1,728 views

  7. Compiling UV

    By PlayDough,
    • 1 reply
    • 2,277 views

  8. UVM 1.1d in QuestaSim with -pedanticerrors

    By tudor.timi,
    • 1 reply
    • 996 views

  9. uvm_re_match

    By love,
    • 1 reply
    • 2,140 views

  10. Need ncsim startup steps.

    By susharma,
    • 1 reply
    • 1,914 views

  11. Can't record dynamic array in sequence item in QuestaSim 10.3a_1

    By enchanter,   
    • 1 reply
    • 2,411 views

  12. Best Technique to Measure Simulation Times using VCS

    By cliffc,   
    • 1 reply
    • 5,234 views

  13. VHDL entity in UVM

    By Naresh Raghava R,   
    • 1 reply
    • 1,361 views

  14. Probing UVM classes in IUS 12.20.004

    By eyafe,   
    • 1 reply
    • 3,086 views

  15. Unable to link UVMC Lib?

    By Dhaval_Shah_,
    • 1 reply
    • 1,327 views

  16. Assertion system tasks error while using VCS compiler

    By pRoSpEr,   
    • 1 reply
    • 2,316 views

  17. problem about debug_all and debug_pp of vcs

    By mrforever,   
    • 1 reply
    • 5,591 views

  18. issue to access hierachy at compile time in VCS

    By uvmcraft,   
    • 1 reply
    • 1,296 views

  19. Can I detect UVM generated randomize transactions in waveform by Mentor tools?

    By leapoo,
    • 1 reply
    • 1,981 views

  20. Problem about uvm_object_defines.svh ???

    By Guest miaoziming,   
    • 1 reply
    • 1,099 views

  21. Nested do in Questasim

    By diju.ms,   
    • 1 reply
    • 2,035 views

  22. Unable to load the implicit shared object

    By sidharth.sankar77,   
    • 1 reply
    • 2,252 views

  23. UVM test simulation using vcs and DVE

    By shireen,
    • 1 reply
    • 1,923 views

  24. How to correct the following error reported in QuestaSim?

    By qinhailiang,
    • 0 replies
    • 1,589 views

  25. How to invoke a UVM based simulation using three step mode rather than irun

    By Roman,
    • 0 replies
    • 2,442 views
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