UVM (Pre-IEEE) Methodology and BCL Forum

944 topics in this forum

1. compare() method with kind option?

   By ptang, May 12, 2011
   • 8 replies
   • 5.5k views
   • 
   • omer_e
   • December 14, 2011

2. UVM 1.1a is available for immediate download

   By Adam Sherilog, December 13, 2011
   • 0 replies
   • 1.4k views
   • 
   • Adam Sherilog
   • December 13, 2011

3. Wait mechanism in subscriber

   By gaurav7589, December 9, 2011
   • 0 replies
   • 898 views
   • 
   • gaurav7589
   • December 9, 2011

4. compare() or do_compare()

   By gaurav7589, December 7, 2011
   • 3 replies
   • 1.9k views
   • 
   • gaurav7589
   • December 9, 2011

5. Best way to communicate a control signal from a monitor to the scoreboard

   By wavy, December 1, 2011
   • 2 replies
   • 3.4k views
   • 
   • Erling
   • December 7, 2011

6. How to design a cool testbench??

   By IChip, November 27, 2011
   • 3 replies
   • 1.4k views
   • 
   • jadec
   • December 1, 2011

7. Register Field Mirroring

   By mbowler, November 30, 2011
   • 2 replies
   • 1.4k views
   • 
   • mbowler
   • November 30, 2011

8. Catching SVA errors in UVM test

   By pulzar, November 24, 2011
   • 5 replies
   • 3.7k views
   • 
   • dudi
   • November 30, 2011

9. Getting the Current Phase

   By bhunter1972, November 28, 2011
   • 3 replies
   • 4.3k views
   • 
   • uwes
   • November 29, 2011

10. How to raise objection in sequences which is not the root sequence?

    By SeanChou, August 5, 2011
    • 14 replies
    • 11.9k views
    • 
    • uwes
    • November 28, 2011

11. constraining repeated sequence

    By ryz, November 23, 2011
    • 6 replies
    • 2.5k views
    • 
    • Erling
    • November 23, 2011

12. Can't randomize members of class derived from uvm_sequence

    By Erling, May 2, 2011
    • 13 replies
    • 5.5k views
    • 
    • ryz
    • November 23, 2011

13. Query about UVM agent

    By bhupali, November 21, 2011
    • 2 replies
    • 1.7k views
    • 
    • bhupali
    • November 23, 2011

14. Subclassing vs. typedef uvm_sequencer

    By petermonsson, November 20, 2011
    • 6 replies
    • 3.4k views
    • 
    • bhunter1972
    • November 21, 2011

15. Phase control of distributed UVC's

    By AgentSmith_l, November 11, 2011
    • 17 replies
    • 2.9k views
    • 
    • uwes
    • November 21, 2011

16. Trivial slave -- still use a sequencer, or use another approach

    By pulzar, November 21, 2011
    • 2 replies
    • 1.5k views
    • 
    • uwes
    • November 21, 2011

17. Executing sequence on multiple sequencers?

    By gbbrown, November 17, 2011
    • 2 replies
    • 1.6k views
    • 
    • uwes
    • November 18, 2011

18. Sequence aware testbenches

    By Erling, November 16, 2011
    • 2 replies
    • 1.4k views
    • 
    • Erling
    • November 17, 2011

19. What is the Future of uvm_reg_file?

    By bhunter1972, November 16, 2011
    • 1 reply
    • 1.7k views
    • 
    • uwes
    • November 17, 2011

20. default phase sequence

    By chenyong, November 15, 2011
    • 4 replies
    • 1.9k views
    • 
    • chenyong
    • November 16, 2011

21. Uvm_deprecated

    By chenyong, November 10, 2011
    • 2 replies
    • 2k views
    • 
    • chenyong
    • November 14, 2011

22. end of test methodology in uvm

    By uwes, July 9, 2010
    • 13 replies
    • 15.6k views
    • 
    • IChip
    • November 14, 2011

23. UVM Register Package - backdoor access

    By siva_aceic, November 14, 2011
    • 0 replies
    • 1.6k views
    • 
    • siva_aceic
    • November 14, 2011

24. About the UVM objections.

    By hugemx830202, April 20, 2011
    • 7 replies
    • 9.9k views
    • 
    • Erling
    • November 7, 2011

25. does UVM support assertion

    By chenyong, November 2, 2011
    • 5 replies
    • 4.2k views
    • 
    • aji.cvc
    • November 6, 2011