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  1. Yesterday
  2. hi sergio, thank you for the feedback! good recommendation. it is somewhat called out in table 3 in the insertion section of the "Mitigations" field. to see examples, refer to table 7. however i agree with you, we need better language around this. thanks, brent
  3. Last week
  4. Hi! I found a minor bug in one of the CMakeLists.txt files: docs/CMakeLists.txt points to the file: docs/tlm/ChangeLog Which doesn't seem to exist anymore. This causes the installation to fail with the current git revision (fd4bedd5). Here's the error message I'm getting on GNU/Linux: -- Installing: /opt/systemc/share/doc/systemc/sysc/archived/FuncSpec20.pdf -- Installing: /opt/systemc/share/doc/systemc/sysc/archived/WhitePaper20.pdf -- Installing: /opt/systemc/share/doc/systemc/sysc/archived/UserGuide20.pdf -- Installing: /opt/systemc/share/doc/systemc/sysc/archived/SystemC_2_1_overview.pdf -- Installing: /opt/systemc/share/doc/systemc/sysc/archived/SystemC_2_1_features.pdf -- Installing: /opt/systemc/share/doc/systemc/sysc/SystemC_2011_New_Features.pdf CMake Error at docs/cmake_install.cmake:77 (file): file INSTALL cannot find "/tmp/systemc/docs/tlm/ChangeLog". Call Stack (most recent call first): cmake_install.cmake:87 (include) make: *** [install] Error 1 Makefile:73: recipe for target 'install' failed The command '/bin/sh -c cmake .. && make && make install' returned a non-zero code: 2 I've attached a patch to remove the file entry which fixes the installation issue. I hope this is useful! Have a nice day. tlm_doc_cmake_fix.patch
  5. The link answers the question on how to apply a distribution to any set of constraints. The dist construct only works with explicit values.
  6. Hi, How did you resolve the issue@Hash
  7. Hi all, The paper states "IP vendors will be able to identify security concerns to either 1) mitigate themselves, or 2) acknowledge for the SoC/ASIC owner to address at the integration level". I think it is important to distinguish as clearly as possible security concerns that are - or at least should have been - addressed by the IP provider, and concerns that should definitely be addressed at the IP integration step. At the moment I do not see any provision to make this distinction clear. Thanks, Sergio Marchese
  8. Hi David, the failing test is expected, hence the 'XFAIL' and the green printing. The compile warnings are coming out of the SystemC library. According to the screenshots you are using an outdated version, can you please retry with SystemC 2.3.3?
  9. For beta 2.0 and 1.0 version, i used gmake check but both failed in one example (attached). Could anyone tell me what causes that? btw, when i was installing it shows warning for signed overflow is that ok?
  10. @dave_59 The link you posted as an answer here points to a question about distributed weighting. I think maybe the link is for the wrong post? Anyway, I am quite interested if there is a way to do what the OP is asking about.
  11. Earlier
  12. SystemC standard does not guarantee any order of process evaluation within a single delta cycle. So in first example both 2,4 and 4,2 will be correct.
  13. I have a simple code as bellow: class Tmodel{ private: sc_event notify_method_2; sc_event notify_method_4; public: sc_event notify_method_3; sc_in<bool> input_port; ... SC_METHOD(method_1); dont_initialize(); sensitive << input_port; SC_METHOD(method_2); dont_initialize(); sensitive << notify_method_2; SC_METHOD(method_3); dont_initialize(); sensitive << notify_method_3; SC_METHOD(method_4); dont_initialize(); sensitive << notify_method_4; ... void method_1(void){ ... notify_method_2.notify(SC_ZERO_TIME); } void method_2(void){ ... printf("method_2\n"); } void method_3(void){ notify_method_4.notify(SC_ZERO_TIME); } void method_4(void){ printf("method_4\n"); } }; int sc_main(int , char *){ ... objectDUT->input_port.write(true); objectDUT->notify_method_3.notify(SC_ZERO_TIME); sc_start(200,SC_PS); ... } when debug, steps as bellow: 1. method_1 , call notify_method_2 2. method_3, call notify_method_4 3. method_4 4. method_2 I dont understand why at step 3 is method_4 ( I think it is method_2 ). if in sc_main, I insert sc_start(0,SC_PS); int sc_main(int , char *){ ... objectDUT->input_port.write(true); sc_start(0,SC_PS); objectDUT->notify_method_3.notify(SC_ZERO_TIME); sc_start(200,SC_PS); ... } steps is correct: 1. method_1 , call notify_method_2 2. method_3, call notify_method_4 3. method_2 4. method_4
  14. They are in namespace sc_core. If you don't want to use namespaces you can change #include <systemc> to #include<systemc.h> and it will pull everything into global namespace.
  15. #include <systemc> SC_MODULE (counter) { sc_in_clk clock ; // Clock input of the design sc_in<bool> reset ; // active high, synchronous Reset input sc_in<bool> enable; // Active high enable signal for counter sc_out<sc_uint<4> > counter_out; // 4 bit vector output of the counter //Local Variables sc_uint<4> count; // Counter logic void incr_count () { // At every rising edge of clock we check if reset is active // If active, we load the counter output with 4'b0000 if (reset.read() == 1) { count = 0; counter_out.write(count); // If enable is active, then we increment the counter } else if (enable.read() == 1) { count = count + 1; counter_out.write(count); cout<<"@" << sc_time_stamp() <<" :: Incremented Counter " <<counter_out.read()<<endl; } } // End of function incr_count // Constructor for the counter // Since this counter is a positive edge trigged one, // We trigger the below block with respect to positive // edge of the clock and also when ever reset changes state SC_CTOR(counter) { cout<<"Executing new"<<endl; SC_METHOD(incr_count); sensitive << reset; sensitive << clock.pos(); } // End of Constructor }; // End of Module counter Hello, I am trying to compile this simple code on SystemC 2.3.3 on MacOSX using the g++-8 compiler. I am receiving the following errors: Are the sc_in and the sc_out types depreciated i the 2.3.3 implementation or is it a compiler specific error?
  16. You also need to include -I, -L and -l for uvm-systemc in your compilation.
  17. It should also be noted that sc_event::notify (all variants) are not blocking methods. You would have to yield your process to see the effects. Yielding is accomplished in SC_THREAD using the sc_core::wait (all variants) methods.
  18. UVM-SystemC is a library. It is not a tool. You are expected to be very knowledgeable in both C++ and SystemC before using it. Knowledge of SystemVerilog UVM is useful. To use on the command-line you would have to decide your build methodology (probably make) and create appropriate files for that. RTFM please.
  19. I cannot find any information about how to run the code by command under the uvm-system. Could any one tell me about it
  20. You are absolutely right, thank you. From point of view of programming, it is OK. Till now, however, I never thought about ports that one create them with new 🙂
  21. I mean if you don't need to connect the port, then don't create the port. This is the idea.
  22. Sorry, I forgot to mention: I have a master port, like this sc_port<scBus_blocking_if> bus_port; If I understand the point correctly, I shall use pointer, that (still within the constructor) I can change from the default null.
  23. Other option is to pass some flag to constructor struct my_module : sc_module { std::unique_ptr< bus_port > bus_slave; my_module(sc_module_name, bool has_slave_port) { if (has_slave_port) { bus_slave = std::make_unique<bus_port>("bus_slave"); } } For SystemC 2.4 there is a sc_optional<T> class proposal that will allow to create ports "on demand" at any time during elaboration.
  24. I have some modules of the same class, and only part of the instances needs access to a certain bus, the others should not be linked to the bus. Of course I know during the setup phase, which ones should and which ones should not. The ones that should connect, I can connect, it works fine. At the same time, for the others, I would like to tell the ports they should not be connected. Is there some method to do so (i.e. I want to avoid 'complete binding failed', not more) . Or, shall I subclass a new module class for those modules, with the only difference that they have an extra port? Or, shall I give those modules a very low priority (they surely will not use the bus), and connect them formally to the bus? (maybe it causes unneeded wiring) I.e.
  25. Since it seems this is not a interesting topic just in case someone is looking for information I came across these papers http://www.verilab.com/files/litterick_register_final.pdf basically claims that factory registration of registers should be avoided to get better performance results Common issues and pitfalls
  26. Clang 5 works fine for me on Linux. This may be a combination of Clang + Cygwin. According to benchmarks https://www.phoronix.com/scan.php?page=article&item=gcc-clang-2019&num=4 compilation time difference for most projects is within 10%.
  27. test.exe debugged above was built by clang 5.0.2. Having configured with --disable-optimize and compiled with clang 5 resulted that all tests passed. In case of clang 8.0.1 test.exe (reset_signal_is test) exited with the same (0103) code. When I added --disable-optimize to configure 'make check' fails at the same test (reset_signal_is) but with different exit code: 05400. What do you recommend? Is it worth to use clang 5 compiler with optimization disabled or better if I stay with gcc? (My main motivation of using clang was to reduce compilation times of SystemC based simulations.) P.
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