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Array when declare port for model


DS1701

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The proper SystemC notion of a port is very different from VHDL or Verilog. Ports are really a very fancy type of pointer used to direct method calls to channels. Note that channels are not signals or wires. Channels are classes that provide public methods to communicate safely between SystemC processes.

The sc_core::sc_int<T> port is actually a partial template specialization for the proper SystemC port, sc_core::sc_port<T>. Ports are always bound to SystemC interfaces. A slightly more complete way of expressing this would be:

using namespace sc_core;

sc_port< sc_signal_in_if <bool> inA; // Port for connecting to a signal channel capable of communicating a single boolean value.

Please note that you don't really initialize ports in the sense of assigning an initial value, because ports do not carry values. You do initialize ports in the sense of C++ construction and subsequent binding of ports to channels. SystemC ports have up to three template parameters (although the interface is normally the only one needed) and normally a single optional constructor argument (the sc_object instance name).

If very much of the wording I've chosen above is foreign to you, then you probably don't have enough C++ programming background yet. Before tackling SystemC you need to be proficient at C++ (not C).

None of your three attempted examples appear correct, but I infer that you may be interested in a port for communicating five bits over an sc_signal channel. This would be done in SystemC as follows:

sc_in<sc_int<5>> inB1;

or

sc_port< sc_signal_in_if<sc_int<5>>> inB2;

Note that the following would not work:

sc_in<bool> inC[5]; // Attempt to create an array of 5 ports for 5 different sc_signal<bool> connections

This is due to the unfortunate manner that array elements are constructed, and SystemC's requirement that component objects must be constructed with unique instance names.

I don't have time to go deeper, andI suggest you either get a good book on SystemC or take a formal class. If you don't have a solid grasp of C++, please be certain to get educated on that as well.

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@David Black Thank you so much !!

I see some projects . They use code as bellow:

//exxe.h
class EXXE
{
public:
    sc_in<sc_dt::uint64>  *clock[3];
    sc_in<bool>           *input[5];
    EXXE();
    ~EXXE();
}
//exxe.cpp
///Constructor
EXXE::EXXE()
{
    std::ostringstream name;
    for (unsigned int index = 0; index < 5; index++) {
        name.str("");
        name << "input" << index;
        input[index] = new sc_in<bool>(name.str().c_str());
    }
    for (unsigned int index = 0; index < 3; index++) {
        name.str("");
        name << "clock" << index;
        clock[index] = new sc_in<sc_dt::uint64>(name.str().c_str());
    }
}

But you said that: "None of your three attempted examples appear correct,...."

Are they incorrect?

Thank @David Black

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2 hours ago, Hook said:

@David Black Thank you so much !!

I see some projects . They use code as bellow:


//exxe.h
class EXXE
{
public:
    sc_in<sc_dt::uint64>  *clock[3];
    sc_in<bool>           *input[5];
    EXXE();
    ~EXXE();
}

//exxe.cpp
///Constructor
EXXE::EXXE()
{
    std::ostringstream name;
    for (unsigned int index = 0; index < 5; index++) {
        name.str("");
        name << "input" << index;
        input[index] = new sc_in<bool>(name.str().c_str());
    }
    for (unsigned int index = 0; index < 3; index++) {
        name.str("");
        name << "clock" << index;
        clock[index] = new sc_in<sc_dt::uint64>(name.str().c_str());
    }
}

But you said that: "None of your three attempted examples appear correct,...."

Are they incorrect?

Thank @David Black

This is a very old style.

With a modern SystemC you can have the same with sc_vector:

//exxe.h
class EXXE : public sc_module
{
public:
    sc_vector<sc_in<sc_dt::uint64>>  SC_NAMED(clock,3);
    sc_vector<sc_in<bool>>           SC_NAMED(input,5);
    EXXE(sc_module_name);
    ~EXXE();
}

But as David mentioned, before starting learning SystemC you should learn C++ first.  Trying to understand SystemC without being proficient with C++ is a waste of time.

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7 hours ago, Roman Popov said:

This is a very old style.

With a modern SystemC you can have the same with sc_vector:


//exxe.h
class EXXE : public sc_module
{
public:
    sc_vector<sc_in<sc_dt::uint64>>  SC_NAMED(clock,3);
    sc_vector<sc_in<bool>>           SC_NAMED(input,5);
    EXXE(sc_module_name);
    ~EXXE();
}

But as David mentioned, before starting learning SystemC you should learn C++ first.  Trying to understand SystemC without being proficient with C++ is a waste of time.

I tried above code ,but it's not working , Can you share me docs about "SC_NAMED" ? 

Thank @Roman Popov

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