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Does anyone know of any open source approximately timed TLM2.0 models?  While there a few examples included in the SystemC download, I am looking for examples of real hardware models to get a better understanding of how model implementers actually use the base protocol (SC_METHOD vs SC_THREAD; 1, 2 or 4 phase, timing annotation, peq_with_get vs peq_with_cb_and_phase, etc.).

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Basically, what I'm interested in is a multi-producer, multi-consumer model over a shared bus.  When not using TLM, I would implement it as follows:

class top : sc_module {

	sc_mutex bus;
	producer p1("p1", bus);
	producer p2("p2", bus);
	consumer c1("c1");
	consumer c2("c2"); 
	
	p1.port(c1.port);
	p2.port(c2.port);

};

class producer : sc_module {
public:
	sc_mutex& bus;
	sc_fifo_out<transaction_object*> port;
	producer(const sc_core::sc_module_name &name_, sc_mutex& bus_) : bus(bus_){ SC_THREAD(thread); }
	void thread(){
		while(true){
      		wait(production_time, SC_US);
      		auto trans* = new transaction_object();
      		bus.lock(); //ensure exclusive access to the bus
      		wait(transmission_time, SC_SEC);
      		port.write(trans); //potentially block if the consumer thread is full; if we don't want to block access to the bus the whole time, we could wait on free space in the consumer fifo before locking the bus.
      		bus.unlock();
      	}
     }
}
      		
class consumer : sc_module {
public:
      sc_core::sc_export<sc_fifo<transaction_object*>> port;
      sc_fifo<transaction_object*> fifo;
      consumer(const sc_core::sc_module_name &name_){ SC_THREAD(thread); port(fifo); }
      void thread(){
      	  while(true){
      	      auto trans = fifo.read();
      	      wait(consumption_time, SC_SEC);
      	  }
      }
}

* Please note, I didn't try to compile the above code and I'm sure there are some syntax bugs; in addition to the obvious memory leak.

This works great, and I think it's easy to understand, but (1) it doesn't follow TLM2.0 standards and (2) I think it might be significantly slower than TLM2.0 AT style. 

The problem I'm having is just that TLM2.0 AT style is just so counter-intuitive for me with callbacks, phases, and timing annotations.  Further, I agree with the advice given by David Black on this forum that SC_THREADs are much more intuitive to understand than SC_METHODs, but I don't see how to implement AT style in a straightforward manner using SC_THREADs. 

A good example, is the SimpleBusAT (given in systemc-2.3.2/examples/tlm/common/include/models/SimpleBusAT.h) -- this looks far more complex than using an sc_mutex and sc_fifo, but I'm wondering if there is a simple design pattern for AT to follow that could help ease model development.

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