Jump to content
avikbose1145

Processing core design using systemc

Recommended Posts

Dear all, can any one give me some guidance...I want to design a processing core like any general purpose processor and want it to execute real time program code...like it will have its own instruction set format and it will execute the target code generated for it...using systemc what are the footsteps i need to follow...i will be obliged highly for your help 

Share this post


Link to post
Share on other sites

Dear Roman sir, i wish to design an ISA (instruction set simulator). I think for synthesizable simulator i need to implement it on a gate level which for now i do not need. Will be obliged for your help

 

In that case you don't need SystemC. You can write your ISA simulator in pure C++.  First learn your ISA, then write a CPU state model (registers), then write instruction parser (decoder and interpreter). 

Share this post


Link to post
Share on other sites

In that case you don't need SystemC. You can write your ISA simulator in pure C++.  First learn your ISA, then write a CPU state model (registers), then write instruction parser (decoder and interpreter). 

Roman sir, i am working on multicore network on chip where i need to test the network as well as the processing time of a thread...i need an event driven simulation which includes both the computation and communication...in that case can i design the processing core using systemc...because in c++ i can not accomplish the cycle accurate processing time...need your precious suggestions.

Share this post


Link to post
Share on other sites

Roman sir, i am working on multicore network on chip where i need to test the network as well as the processing time of a thread...i need an event driven simulation which includes both the computation and communication...in that case can i design the processing core using systemc...because in c++ i can not accomplish the cycle accurate processing time...need your precious suggestions.

 

In that case you will need to learn SystemC TLM modeling. You can still write your CPU model in pure C++ but provide some hooks for event notifications and cycle count tracking.

Unfortunately, (In my experience) there is no good learning material for beginners. 

You can check Duolos TLM tutorial: https://www.doulos.com/knowhow/systemc/tlm2/tutorial__1/

On GreenSocs Git there are examples of integrating CPU models with SystemC/TLM https://git.greensocs.com/explore/projects

Share this post


Link to post
Share on other sites

In that case you will need to learn SystemC TLM modeling. You can still write your CPU model in pure C++ but provide some hooks for event notifications and cycle count tracking.

Unfortunately, (In my experience) there is no good learning material for beginners. 

You can check Duolos TLM tutorial: https://www.doulos.com/knowhow/systemc/tlm2/tutorial__1/

On GreenSocs Git there are examples of integrating CPU models with SystemC/TLM https://git.greensocs.com/explore/projects

Thank you Sir

Share this post


Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now

×