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walkeranderson

Controlling timescale with set_timeout

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What is the recommended way to control the timescale of the UVM timeout as set with set_timeout()?

 

Controlling the timescale in the calling code doesn't seem to work.

 

For example, 

 

`timescale 1ns/1ps

 

...

 

uvm_top.set_timeout(2000000ns, 1);

 

 

 

 

results in the timeout set to 2000ns.  UVM seems to be using a timescale of 1ps.

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The value that you pass in is of type time, which is essentially just an integer scaled to the timescale of the code where you the function. You're going to have to pre-scale it yourself to the appropriate value. UVM itself doesn't have a timescale defined (which is unfortunate because it makes use of #(...) delays), but you can usually set a default timescale for packages from the compiler command line.

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Hi Walker,

 

Communicating time values across multiple timescale domains has been a gotcha in Verilog since day one. Timescales only apply to scaling of literal time values, not values of variables or passed arguments. Therefore, you should always use a literal time value in any expression involving time to a normalized time unit.

Unfortunately, they didn't do this inside the UVM library. So if your UVM package is compiled with a default of timescale of 1ps, then you should do this to normalize it :

uvm_top.set_timeout(2000000ns/1ps, 1);

 

-Dave

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hi,

 

... this nasty timescale problem....

 

you got a few options

 

1. scale like dave suggests

2. force all timescales to be the same in your system

3. uvm could have implemented a workaround used in the tlm2 area (uvm_tlm_time) and use this data type to represent time instead of the broken,bad sv native "time" datatype. all uvm api would use this uvm_time data type  (

 

4. the solution i would prefer however is that the sv -1800 committee goes and provides a real "time" datatype which scales properly when switching timescale regions... (or even better get rid of timescale at all) 

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