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I am writing I2C model (as per my requirement) which include master.cpp and slave.cpp. There are 2 signals: SDA and SCL, both are type of sc_inout_resolved in both the files. Connection and Port binding is done perfectly in test bench as well.  I am controlling SDA & SCL in file called master.cpp. While transferring ack from slave to master,  SDA will be controlled by slave.cpp (writes SDA 0). After this again master.cpp should control the SDA line for further transactions. But once controlling on SDA switches to slave.cpp, unable to control SDA again from master.cpp. Writing values(0,1) on SDA is not making any difference. I confirmed this issue using gtkwave. Am I missing anything here? Can anyone tell how to handle sc_inout_resolved between 2 models?.

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One other thing to note is that I2C uses an open drain connection, which in VHDL you can model with 'H' (weak high). But in sc_logic you've haven't got 'H', so you'll probably have to use 'Z' to model the undriven (no pull down) state of the I2C connections.

 

regards

Alan

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