kaiserhaz Posted December 21, 2015 Report Share Posted December 21, 2015 Hello, I used b_transport in of my TL models to exchange data from a transactor to a memory. It was a read/write/reset operation kinda thing. Data from memory is transferred to another module attached to the transactor. What I noticed was at the end of my b_transport call, the simulation ends directly, without returning to the transactor thread in order to affect the obtained data from memory (in case of a read operation, for example) to the port connecting the transactor and the other module. Why is this? Code for reference: memory // TLM-2 blocking transport method virtual void b_transport(tlm::tlm_generic_payload& trans, sc_time& delay) { /** Code here to transfer data **/ // Realize wait delay to advance simulation time wait(delay); // After wait, the simulator goes directly back to sc_main } transactor void thread_process() { /** Code here **/ while(true) { wait(CLK->posedge_event()); // Wait on CLK posedge event /** More code here **/ payload_setup(trans, cmd, data_ref, addr); rtt2a_socket->b_transport(*trans, delay); // Blocking transport call. Trans is a generic payload // I expected the program to return here, but it didn't // Initiator obliged to check response status and delay if (trans->is_response_error()) SC_REPORT_ERROR("TLM-2", "Response error from b_transport"); if(cmd == tlm::TLM_READ_COMMAND) DATA->write(d_word_t(data)); // Write data back to port. So far, this does not work properly } Thank you, Quote Link to comment Share on other sites More sharing options...
apfitch Posted December 22, 2015 Report Share Posted December 22, 2015 Perhaps you haven't set the value of "delay" ? Alan Quote Link to comment Share on other sites More sharing options...
kaiserhaz Posted December 23, 2015 Author Report Share Posted December 23, 2015 I did set it previously. I found out the problem by the way. I set simulation duration to be exactly the same as that of the b_transport, therefore somehow the simulation ends after the call to wait. Maybe I need more training in writing adaptor-type transactors? Kinda getting tedious trying to interface RTL and TLM Quote Link to comment Share on other sites More sharing options...
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