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dilawar

can't instantiate sub-modules using vector `port not bound` error

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Hi,

 

I have two files. In header file I have two modules `camkii` and `camkii_ring`. The `camkii_ring` contains N number of `camkii` submodule.  I thought of using std::vector to instantiate the submodules. See the code below.

 

 

 
#ifndef CAMKII_H
#define CAMKII_H


#include <systemc.h>
#include <vector>


using namespace std;


SC_MODULE(camkii)
{


    sc_in_clk clock;
    sc_in<double> ca_conc_in;


    sc_signal<double> v1, v2, v3;

    void init()
    {
        cout << "[Ca] " << ca_conc_in << endl;
        //cout << sc_get_time_resolution() << endl;
        
    }

    void compute_rate()
    {
         // do something
    }


    SC_CTOR(camkii)
    {
        init();


        SC_METHOD(compute_rates);
        sensitive << clock.pos();
    }
};


/*
 * This module is a ring of CamKII holoenzyme. It has total of 6 camkii
 * holoenzymes.
 */
SC_MODULE( camkii_ring )
{
    sc_in_clk clock;
    sc_in<double> ca_in;


    /* It has 6 subunits of holoenzymes */
    vector<camkii*> subunits;


    void init()
    {
        for( int i = 0; i < 6; i++)
        {
            stringstream name;
            name << "sub" << i;
            camkii* c = new camkii(name.str().c_str());
            c->clock(clock);
            c->ca_conc_in(ca_in);
            subunits.push_back(c);
        }
    }


    void compute()
    {
    }


    SC_CTOR(camkii_ring)
    {
        init();


        SC_METHOD(compute);
        sensitive << clock.pos();


    }
};


#endif /* end of include guard: CAMKII_H */

And here is my main.cc file.

 

#include "camkii.h"
#include <systemc.h>


#include <iostream>


using namespace std;


int sc_main(int argc, char** argv)
{
    sc_clock clock_("GlobalClock", 10, SC_MS, 0.5);


    sc_signal<double> ca_conc, i1p_conc;
    sc_signal<double> camkii_out;

     /* connect the camkii ring to ports */
    camkii_ring camkii_ring("cakii_ring");
    camkii_ring.clock(clock_);
    camkii_ring.ca_in(ca_conc);


    cout << "Starting ..." << endl;
    sc_start(100, SC_MS);


    return 1;
}

It compiles fine but when I run it

 

 

 Error: (E112) get interface failed: port is not bound: port 'cakii_ring.sub0.port_1' (sc_in)

In file: sc_port.cpp:230
 

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Hi.

 

This is because an unbound port cannot be read.

A port forwards all read and write calls to the actual interface (signal) it is bound to. In you module constructor, you are still in the model set up and elaboration phase. The port is not yet bound to any signal. Hence, you cannot read from it. Accessing ports should not be done befor end-of-elaboration.

 

Greetings

Ralph

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