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yyn

Question for mirror() function in uvm_reg

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Hello,

My test case reads the register data from DUT using mirror() after reset is ended.

But, the error occurrs like this.

[195] UVM_ERROR (RegModel) Register "xxxx" value read from DUT (0x0000) does not match mirrored value (0x80).

In my testbench, the register is set through AXI interface. The time "195 ns" that the error is reported is the time that read transaction is started. Actually, the readback value from DUT appears in "245 ns".

I think the datas between the DUT readback value and the expected value of register package are compared in end of read transaction. But mirror() function of uvm_reg compares the data at the start of transaction.

How can I fix my problem?

How can I implement that the data can be compared at the end of transaction?

Thanks & Regards,

yyn

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When I setup my register model I had a similar issue. The register model wasn't waiting for the response from my bus sequencer. I think I had to

1) Add a line to the adapter class setting has_response to true.

2) In the call to mirror() one of the arguments should most likely be 'this', This will provide the sequencer something that it can wait on.

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Hello mszabo,

Thanks for reply.

I have a question for your answer.

I am using UVM1.1 and my adapter has only bus2reg() and reg2bus() function.

Where can I add "has_response"?

Can you show me the example?

Thanks & Regards,

yyn

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Hi guys, it looks like it is a uvm bug right? Since as addressed in the uvm user guide, "the mirror() method invokes the read() method to update the mirrored value based on the readback value. mirror() can also compare the readback value with the current mirrored value before updating it.".

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I wouldn't say that is necessarily true. I have seen mirror() work in my system. I abandoned it as my system was a little to complex for it to work well but that was due to limitations of the predict() method I posted about last month. The register model depends on the rest of the verification environment being in place and working properly so I'd say it is likely an operator error either with the adapter class used to translate the uvm_reg_sequence into AXI bus sequence, or with the AXI sequencer. Neither of those are UVM standard components. My guess is the sequencer is incorrectly sending the read response back to the user prior to the data getting onto the bus, or the adapter or user of mirror() isn't properly waiting for that response. Before blaming mirror() I'd try read() and see if that actually returns the correct register data.

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Hi Everyone,

I have the same problem with my mirror function,

1)I use a write method to the dut which updates both my DUT and the register model.

2)I use the mirror method to read back the DUT value and do a comparision with the mirrored value.

The above combination gives me an uvm_error when i use explicit moinitoring ..but works fine when i am using implicit monitoring.

I see that the mirrored value is compared against the reset value and not the written value.

Please let me know your suggestion on how i can use the mirror method with explicit monitoring .

Thanks and Regards,

Kiran Bhaskar

I wouldn't say that is necessarily true. I have seen mirror() work in my system. I abandoned it as my system was a little to complex for it to work well but that was due to limitations of the predict() method I posted about last month. The register model depends on the rest of the verification environment being in place and working properly so I'd say it is likely an operator error either with the adapter class used to translate the uvm_reg_sequence into AXI bus sequence, or with the AXI sequencer. Neither of those are UVM standard components. My guess is the sequencer is incorrectly sending the read response back to the user prior to the data getting onto the bus, or the adapter or user of mirror() isn't properly waiting for that response. Before blaming mirror() I'd try read() and see if that actually returns the correct register data.

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