looking for a replacement for vera_crc()

[roginski]

I'm switching from Vera to SystemVerilog/UVM.

Vera had a handy function called vera_crc that

calculated crc's. What do SystemVerilog folks use?

Thanks, -K

[uwes]

hi,

there is no crc function predefined neither in SV nor in UVM (althrough there is an uvm_oneway_hash). depending upon what you want to do with that function it might have different solutions with SV+UVM.

- you really require a particular CRC function to compute a CRC as required in a protocol

- you require a hash function which maps a set of values into a single unique value (one way hash function)

[roginski]

I'm generating ethernet packets, they need a 32-bit crc on the end.

Another question, is there an example of a UVM testbench for

a networking device? Send packets into a port, receive packets

back out, and check them?

[jeff.schroeder]

I realize this thread is a bit old, but in case you're still interested, I would recommend reading the paper at http://www.ross.net/crc/crcpaper.html. It's a very good layman's explanation of how table-driven CRC algorithms are derived. Using that, I was able to create a small SV package that implements a parameterized class that calculates CRCs for any polynomial that you desire. It's a worthwhile exercise both in understanding CRCs and in creating an efficient SV class implementation, and it's a fairly small undertaking.

The real challenge is figuring out what parameters to use for any given standard. (The polynomial is just one of several.) The paper gives you the parameters for Ethernet, so you're set there.