UVM code generates UVM warning for nested register block

[walkeranderson]

Creating a UVM register block that is a sub-block of another UVM register block, when I call the configure function of the sub-block, I get this warning.

 

UVM_WARNING @ 0 ns: reporter [uVM/RSRC/NOREGEX] a resource with meta characters in the field name has been created "regs.foo_regs"

 

because of this implementation of configure from the UVM 1.2 source code

 

function void uvm_reg_block::configure(uvm_reg_block parent=null, string hdl_path="");

  this.parent = parent;

  if (parent != null)

    this.parent.add_block(this);

  add_hdl_path(hdl_path);

 

  uvm_resource_db#(uvm_reg_block)::set("uvm_reg::*", get_full_name(), this); endfunction

 

 

Because the full name for the sub-block includes the name of the parent block with a "." between it.

 

Am I missing something or doing something wrong?  Seems like this will always happen with nested register blocks.

 

[uwes]

hi,

 

there are two sides to it.

 

1. http://eda.org/svdb/view.php?id=5040

2. field names should not contain meta characters such as "." or "*" to avoid semantic issues. (the meta characters might be considered as wildcards or globs and the matching order, priority etc might be implementation dependent and unexpected. there is also a set of mantis items

 

http://eda.org/svdb/view.php?id=3479

http://eda.org/svdb/view.php?id=4618

 

/uwe

[walkeranderson]

Right.  I have no problem with the check/warning.  But the code that's causing it is in the UVM library and all that I did to expose it was create a nested register block.

 

What's the recommended workaround?  I downgraded the warning but perhaps there is something more elegant.

 

Thanks.