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verification env for can controller using uvm


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in can controller we have many sub modules like

acceptance filter

registers

frame generators

synchronizers etc...

 

how to create verification env for it.

do i need to verify all these sub components using uvm env only or seperately.

each can controller acts as master and slave, if i have 4 can nodes, how many agents are required and does each node have both master and slave capabilities.

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It depends on what you have to do. I'm guessing you don't really need to verify each of the individual sub-modules individually, so one big UVM env would be enough. As for the number of agents, it again depends on your objectives. I've been playing around with a CAN controller that has 2 nodes and one agent was fine enough for me. CAN anyway has a broadcast architecture so you can communicate to one agent from either of your DUT's nodes.

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using one agent how can i verify a can controller.

 

i'm thinking that i should have atleast 2 agents.

1 agent is with microprocessor interface used to program can controller and send data to can controller by puttting data into transmit buffer.

1 agent is with can interface used as other node in can bus network.

if i have more nodes (suppose 5) i'm think i should have 5 agents with can interface.

 

is my understanding correct.

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