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WangYuchen

Address mapping in TLM

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Hello all,

Here is my platform structure:

1. 4 MIPS processors have separated data memories ( "data0--data3" ) by separated buses ( "busd0-3" )

2. 4 processors share the same program memory ( "program" ) by ("busp0-3" and "busp_sh")

source codes of platform :

		   program			  ("program", "sp1", 0x10000000),
		   data0				   ("data0", "sp1", 0x10000),
		   data1				   ("data1", "sp1", 0x10000),
		   data2				   ("data2", "sp1", 0x10000),
		   data3				   ("data3", "sp1", 0x10000),
		   ……
		   // busp_sh
		   busp_sh.initiator_socket[0](program.sp1);
		   busp_sh.setDecode(0, 0x0, 0xfffffff);
		   // busp0 master
		   cpu0.INSTRUCTION.socket(busp0.target_socket[0]);
		   // busp0 slave
		   busp0.initiator_socket[0](busp_sh.target_socket[0]);// Program Memory
		   busp0.setDecode(0, 0x80080000, 0x8017ffff);
		   // busp1 master
		   cpu1.INSTRUCTION.socket(busp1.target_socket[0]);
		   // busp1 slave
		   busp1.initiator_socket[0](busp_sh.target_socket[1]);// Program Memory
		   busp1.setDecode(0, 0x80180000, 0x8027ffff);
		   // busp2 master
		   cpu2.INSTRUCTION.socket(busp2.target_socket[0]);
		   // busp2 slave
		   busp2.initiator_socket[0](busp_sh.target_socket[2]);// Program Memory
		   busp2.setDecode(0, 0x80280000, 0x8037ffff);
		   // busp3 master
		   cpu3.INSTRUCTION.socket(busp3.target_socket[0]);
		   // busp3 slave
		   busp3.initiator_socket[0](busp_sh.target_socket[3]);// Program Memory
		   busp3.setDecode(0, 0x80380000, 0x8047ffff);

		   // busd0 master
		   cpu0.DATA.socket(busd0.target_socket[0]);
		   // busd0 slave
		   busd0.initiator_socket[0](data0.sp1);					 // Data Memory
		   busd0.setDecode(0, 0x08000000, 0x0800ffff);
		   // busd1 master
		   cpu1.DATA.socket(busd1.target_socket[0]);
		   // busd1 slave
		   busd1.initiator_socket[0](data1.sp1);					 // Data Memory
		   busd1.setDecode(0, 0x08010000, 0x0801ffff);
		   // busd2 master
		   cpu2.DATA.socket(busd2.target_socket[0]);
		   // busd2 slave
		   busd2.initiator_socket[0](data2.sp1);					 // Data Memory
		   busd2.setDecode(0, 0x08020000, 0x0802ffff);
		   // busd3 master
		   cpu3.DATA.socket(busd3.target_socket[0]);
		   // busd3 slave
		   busd3.initiator_socket[0](data3.sp1);					 // Data Memory
		   busd3.setDecode(0, 0x08030000, 0x0803ffff);
		   ……

   int sc_main()
   {
		   unsigned char *targetshPtr = top.program.getMemory()->get_mem_ptr();
		   top.cpu0.loadNativeMemory(targetshPtr, 0x10000, 0x80080000, "program", app, 0, 1, 1);			  
	}

Here is the definition of "loadNativeMemory()":

/// Load an object file into native memory.
/// The native memory has been allocated by the user (it is not ICM memory),
/// and has probably been mapped into this procesor's address space using
/// the icmBusObject mapNativeMemory() method.
/// This is available as a method on the processor object so that the code can
/// be intercepted by any intercept library associated with this processor.
/// @param nativeMemory Pointer to the (pre-allocated) native memory.
/// @param roomInBytes  Size of the allocated region (provided so the loader can detect
///					 and prevent overflow.
/// @param base		 The physical bas of this memory in the processor address space.
///					 The base is subtracted from each load-address before loading.
/// @param memoryName   A name chosen for the memory. This is used by the loader
///					 when reporting errors.
/// @param objectFile   Path to the object file (currently ELF format only).
/// @param loadPhysical If true, use the physical addresses from the object file
///					 (otherwise use the logical addresses).
/// @param verbose	  If true, print a summary of the sections as they are loaded.
/// @param useEntry	 If true, set the processor PC to the entry point
void loadNativeMemory(
	void		 *nativeMemory,
	Uns64		 roomInBytes,
	Uns64		 base,
	const		 char *memoryName,
	const		 char *objectFile,
	Bool		  loadPhysical,
	Bool		  verbose,
	Bool		  useEntry
);

The result of simulation shows that :

Info (ICM_AL) Found attribute symbol 'modelAttrs' in file '/opt/comware/share/Imperas/Imperas32/Imperas.20120614/lib/Linux32/ImperasLib/mips.ovpworld.org/semihosting/mips32SDE/1.0/model.so'
Info (ICM_AL) Found attribute symbol 'modelAttrs' in file '/opt/comware/share/Imperas/Imperas32/Imperas.20120614/lib/Linux32/ImperasLib/mips.ovpworld.org/processor/mips32/1.0/model.so'
Info (OR_OF) Target 'program' has object file read from './program_examples/test.MIPS32.elf'
Info (OR_SH)	 Section		flg  sect addr   size		load addr   file offset
Info (OR_SD)	 .text		  -ax  0x80080000  0x00005840  0x80080000  0x00000058
Info (OR_SD)	 .init		  -ax  0x80085840  0x00000024  0x80085840  0x00005898
Info (OR_SD)	 .fini		  -ax  0x80085864  0x0000001c  0x80085864  0x000058bc
Info (OR_SD)	 .rodata	  -a-  0x80085880  0x000007f8  0x80085880  0x000058d8
Info (OR_SD)	 .sdeinit	   -a-  0x80086078  0x00000004  0x80086078  0x000060d0
Info (OR_SD)	 .sdefini	   -a-  0x8008607c  0x00000004  0x8008607c  0x000060d4
Info (OR_SD)	 .sdeosabi	  -a-  0x80086080  0x00000008  0x80086080  0x000060d8
Info (OR_SD)	 .eh_frame	  -a-  0x80086088  0x00000044  0x80086088  0x000060e0
Info (OR_SD)	 .data		  wa-  0x800860d0  0x000002d8  0x800860d0  0x00006128
Info (OR_SD)	 .ctors		 wa-  0x800863a8  0x00000008  0x800863a8  0x00006400
Info (OR_SD)	 .dtors		 wa-  0x800863b0  0x00000008  0x800863b0  0x00006408
Info (OR_SD)	 .jcr		 wa-  0x800863b8  0x00000004  0x800863b8  0x00006410
Info (OR_SD)	 .sdata		 wa-  0x800863bc  0x00000018  0x800863bc  0x00006414
Processor Exception (PC_PRX) Processor 'top.cpu0' 0x80080030: lw	  t0,25156(t0)
Processor Exception (PC_RDX) Read abort at 0x80086244

In initialization, I separated all the decode ranges to get rid of overlapping.

Read abort indicates there is no memory at the address being read.

Could you give me any hits for this error?

Thank you very much.

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