internal signal error

[milind.shende5]

Hello Experts, 

 

presently I am designing a simple A2D converter in SystemC-AMS. While compiling complier returns with some errors. I would be very thankful to you, if you could comment on the errors messages. 

 

// A2D.h

#include <systemc-ams>

#include <systemc>

#include <stdio.h>

using namespace std;

 

SCA_TDF_MODULE (a2d_nbit)

 

{

  //port declaration

  sca_tdf::sca_in<double> a_in; // analog input pin

 

  sca_tdf::sca_de::sca_in<sc_dt::sc_logic> start; //start signal

  sca_tdf::sca_de::sca_in<sc_dt::sc_logic> clk; //clock signal

 

  sca_tdf::sca_de::sca_out<sc_dt::sc_logic> eoc; //end of conversion pin  

  sca_tdf::sca_de::sca_out< sc_dt::sc_lv<8> > d_out; // digital output signal

 

  a2d_nbit(sc_core::sc_module_name nm, double Vmax_ = 5.0, double delay_ = 10.0e-6, int bit_rng = 8): 

    a_in("a_in"), start("start"),clk("clk"), eoc("eoc"), d_out("d_out"), Vmax(Vmax_), delay(delay_), bit_range(bit_rng){}

 

  void set_attribute()

  {

    set_timestep(10.0, sc_core::SC_US);

    eoc.set_delay(0);

  }

 

  void initialize()

  {

    //eoc.initialize(sc_dt::SC_LOGIC_0);

  }

 

  void processing();

  

 private:

  double Vmax; // ADC maximum range

  double delay; // ADC conversion time 

  int bit_range; //vector length of d_temp and d_out

  

};

 

//A2D.cpp

has got only processing function defined. 

 

//A2D_top_level.cpp

 

1. #include<systemc-ams.h>
2. #include<systemc.h>
3. #include<A2D.h>
4. #include<vtg_src.h>
5. using namespace std;
6. using namespace sc_core;
7.  
8. SC_MODULE (A2D_top_level)
9. {
10.   a2d_nbit a2d; 
11.   vtg_src input_vtg;
12.  
13.   sc_clock clk1("clk1", 100, SC_US,0.5, true);
14.   
15.  
16.  
17.   void start_logic(){
18.     while(true)
19.       {
20.             start.write(sc_dt::SC_LOGIC_0);
21.             wait(2, sc_core::SC_MS);
22.             start.write(sc_dt::SC_LOGIC_1);
23.             wait(2, sc_core::SC_MS);
24.             start.write(sc_dt::SC_LOGIC_0);
25.            sc_core::sc_stop();
26.       }
27.   }
28.  
29.   A2D_top_level(sc_core::sc_module_name nm): in("in"), out("out"), a2d("a2d"),  input_vtg("input_vtg"),clk1("clk1"), start("start"), clk("clk"), eoc("eoc")
30.     {
31.       input_vtg.out(in);
32.  
33.       clk(clk1.signal());
34.  
35.       a2d.a_in(in); 
36.       a2d.start(start);
37.       a2d.clk(clk);
38.       a2d.eoc(eoc);
39.    // a2d.d_out(out);
40.  
41.       SC_THREAD(start_logic);
42.     }
43.  
44.     private:
45.  
46.     sca_tdf::sca_signal <double> in;
47.     sc_core::sc_signal<sc_dt::sc_lv<8> > out;
48.     sc_core::sc_signal<sc_dt::sc_logic> start, clk, eoc;
49.  
50. };  

compiler returns with following errors !!!

 

A2D_top_level.cpp:13: error: expected identifier before string constant

A2D_top_level.cpp:13: error: expected ‘,’ or ‘...’ before string constant

A2D_top_level.cpp: In constructor ‘A2D_top_level::A2D_top_level(sc_core::sc_module_name)’:

A2D_top_level.cpp:29: error: class ‘A2D_top_level’ does not have any field named ‘clk1’

A2D_top_level.cpp:33: error: ‘((A2D_top_level*)this)->A2D_top_level::clk1’ does not have class type

A2D_top_level.cpp:41: error: ‘SC_CURRENT_USER_MODULE’ has not been declared

 

please let me know your views. thanks in advance. 

 

Milind.

[ralph.goergen]

Hi.

 

In C++, you are not allowed to pass constructor parameters to a class member at the declaration.

 

Use the constructors initializer list instead (for all arguments not only for the string name). 

 

Greetings

Ralph

[ralph.goergen]

Hello again. 

 

Second problem: 

If you do not use the SC_CTOR macro to declare the constructor, you should add the SC_HAS_PROCESS macro to your module. 

See: 'IEEE 1666-2011: 5.2.7 SC_CTOR' for more information.

 

Greetings

Ralph

[sumit_tuwien]

Apart for many other problems you have a mixture of SystemC and SystemC-AMS constructs. You cannot have that. sca_tdf::sca_signal <double> in cannot be used inside SC_MODULE. Please go through the LRM well before you start coding.

[maehne]

A TDF signal (as well as TDF ports) can be declared in an SC_MODULE given that they're purely used for a structural description, i.e. interconnection of TDF submodules and binding of their ports to some ports of the parent module (port-to-port binding). I suggest you to have a look into the SystemC AMS User's Guide, which describes the binding rules quite well.

 

Ralph very well pointed out the source of your compiler problems.

 

Regards, Torsten

[milind.shende5]

Hello All, 

thanks for your prompt and kind replies. 

 

I would like to know, if I have child TDF module which has a output port 

 

sca_tdf::sca_de::sca_out<sc_dt::sc_logic> eoc;                  //end of conversion pin  

sca_tdf::sca_de::sca_out< sc_dt::sc_lv<8> > d_out;            // digital output signal

 

in a top_level SC_MODULE, where I instantiate above TDF module, what kind of internal signals I need to declare in order to connect these ports.

I have gone through the port binding guidelines in the user guide (2.3.3. Structural composition of TDF modules) , but unable to find out the reference for such ports

 

please suggest !!! thanks. 

regards,

Milind. 

[milind.shende5]

Hello All,

thanks for kind replies. The compilation errors are solved !!! The changes made in the code are highlighted in blue color.....

#include<systemc-ams.h>

#include<systemc>

#include<A2D.h>

#include<vtg_src.h>

using namespace std;

using namespace sc_core;

SC_MODULE (A2D_top_level)

{

a2d_nbit a2d;

vtg_src input_vtg;

sc_core::sc_clock clk1;

void start_logic(){

while(true)

{

start.write(sc_dt::SC_LOGIC_0);

wait(2, sc_core::SC_MS);

start.write(sc_dt::SC_LOGIC_1);

wait(2, sc_core::SC_MS);

start.write(sc_dt::SC_LOGIC_0);

sc_core::sc_stop();

}

}

SC_CTOR(A2D_top_level): in("in"), out("out"), a2d("a2d"), input_vtg("input_vtg"),clk1("clk1", 100, SC_US, 0.5, true), start("start"), eoc("eoc")

{

input_vtg.out(in);

//clk(clk1.signal());

a2d.a_in(in);

a2d.start(start);

a2d.clk(clk1.signal());

a2d.eoc(eoc);

a2d.d_out(out);

SC_THREAD(start_logic);

}

public:

sca_tdf::sca_signal <double> in;

sc_core::sc_signal<sc_dt::sc_lv<8> > out;

sc_core::sc_signal<sc_dt::sc_logic> start, eoc;

};

thanks ones again.

regards,

Milind.

[maehne]

Hello All, 

thanks for your prompt and kind replies. 

 

I would like to know, if I have child TDF module which has a output port 

 

sca_tdf::sca_de::sca_out<sc_dt::sc_logic> eoc;                  //end of conversion pin  

sca_tdf::sca_de::sca_out< sc_dt::sc_lv<8> > d_out;            // digital output signal

 

in a top_level SC_MODULE, where I instantiate above TDF module, what kind of internal signals I need to declare in order to connect these ports.

I have gone through the port binding guidelines in the user guide (2.3.3. Structural composition of TDF modules) , but unable to find out the reference for such ports

 

please suggest !!! thanks. 

regards,

Milind. 

The converter ports sca_tdf::sca_de::sca_in<T> and sca_tdf::sca_de::sca_out<T> have to be bound to DE signals of type sc_core::sc_signal<T> (cf. to Figure 2.20 in section 2.3.3 in the SystemC AMS User's Guide).