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David Long

Another FREE Doulos Webinar - VHLD vs SystemVerilog vs SystemC

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John Aynsley, Doulos CTO will be presenting a FREE webinar on "VHDL versus SystemVerilog versus SystemC" on Friday 3 May 2013


There will be 2 sessions to enable attendees from different time zones:


1st run:

Time: 9am-10am (BST - UK) bullet.gif 10am-11am (CEST) bullet.gif 1.30pm-2.30pm (IST)


2nd run:

Time: 9am-10am (PDT) bullet.gif 12pm-1pm (EDT) bullet.gif 5pm-6pm (BST - UK)


For further details and to register, please see the link on the Doulos website:




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