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Found 8 results

  1. I'm trying out the example for UVM-Connect 2.3 and I can't get a successful compile. The error message is about the "undefined reference to `m__uvm_report_dpi'. I'm using: GCC 4.5.2 on CentOS 5.11 VCS 2015.09-SP2-3 SystemC 2.3.1 SCV 2.0.0 UVM 1.2 UVMC 2.3.0 Appreciate all the help!
  2. How can I check which VCS version I am using, from a Linux command line? I don't want to run a sim to find this information. I am looking for smthg like "irun -version", but for VCS. Pre-post discovery: It looks like "vcs -help", among other things, shows the compiler version. Afaik, the compiler version and simulator version are the same. Right? Normally, I wouldn't ask that, but I see/know that some tools (or subsections of tools) don't move in lock-step for versions (like simulators and waveform viewers). (Posting here because I didn't easily find this in VCS documentation and had SolvNet problems, and I find it better not to ask non-proprietary questions where the answer is available to the public.)
  3. Using VCS, I can compile and run multiple top-level modules. In the example I am running, I have a dut module and a bind-file module. The bind-file module is nothing more than: module bindfiles; bind dut pLib_dut p1 (.*); endmodule When I compile and run, I indeed see both top modules have been compiled: Top Level Modules: bindfiles dut And both run just fine as expected. Now the question: If I compile both top modules, can I run simv with just the dut module and ignore the bindfiles module? I would like to simulate both with the bindfiles and without the bindfiles module if possible without re-ocmpiling. Thanks - Cliff Cummings Sunburst Design, Inc.
  4. Does VCSCompiler for SystemVerilog provides support for assertion based system tasks like $assertvacuousoff. I have been compiling my .sv file and getting an UST error.
  5. During the compilation process, my code met two make erros: make[1]: *** No rule to make target `/proj/verif_release_ro/ovmkit_o2.1.2_u1.1b/14/uvm/src/dpi/uvm_dpi.c', needed by `uvm_dpi.o'. Stop. make[1]: Leaving directory `.../src/verif/interface/master/examples/master_b2b_test/csrc' Could anybody tell me what this problem is? Thank you very much in advance!
  6. Hi, all Does anybody know the differences between debug_all and debug_pp. When i use -debug_all option, vcs runs my test successfully, it will failed if i change -debug_all to -debug_pp. This is the error message and corresponding code: Error-[NOA] Null object access /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_pool.svh, 307 The object is being used before it was constructed/allocated. Please make sure that the object is newed before using it. #0 in \uvm_object_string_pool#(uvm_event)::get at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_pool.svh:307 #1 in \uvm_transaction::new at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_transaction.svh:494 #2 in \uvm_sequence_item::new at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/seq/uvm_sequence_item.svh:53 #3 in \my_tr::new at ../sv/common/my_tr.sv:495 #4 in \uvm_object_registry#(my_tr,"my_tr")::create_object at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_registry.svh:197 #5 in \uvm_factory::create_object_by_type at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_factory.svh:1104 #6 in \uvm_object_registry#(my_tr,"my_tr")::create at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_registry.svh:248 #7 in \my_monitor::run_phase at ../sv/master/my_monitor.sv:91 #8 in \uvm_run_phase::exec_task at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_common_phases.svh:245 #9 in \uvm_task_phase::execute at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_task_phase.svh:150 #10 in \uvm_task_phase::m_traverse at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_task_phase.svh:112 #11 in \uvm_task_phase::m_traverse at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_task_phase.svh:92 #12 in \uvm_task_phase::m_traverse at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_task_phase.svh:92 #13 in \uvm_task_phase::m_traverse at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_task_phase.svh:92 #14 in \uvm_task_phase::m_traverse at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_task_phase.svh:92 #15 in \uvm_task_phase::m_traverse at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_task_phase.svh:92 #16 in \uvm_task_phase::traverse at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_task_phase.svh:80 #17 in \uvm_phase::execute_phase at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_phase.svh:1171 #18 in \uvm_phase::m_run_phases at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_phase.svh:1847 #19 in \uvm_root::run_test at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_root.svh:417 #20 in run_test at /EDA_Tools/synopsys/vcs_vE-2011.03/etc/uvm-1.1/uvm-1.1d/src/base/uvm_globals.svh:40 #21 in unnamed$$_15 at ../sv/top/my_top.sv:470 #22 in my_tb_top Pieces code of my_monitor.sv: virtual task run_phase(uvm_phase phase); my_tr axi_item; @(negedge clkmg_vif.rst); forever begin @(this.clkmg_vif.wait_one_clk); axi_item = my_tr::type_id::create("axi_item"); collect_pkt(axi_item); scb_port.write(axi_item); end endtask : run_phase By the way, class my_tr has using the field and factory mechanism. Anybody met the same problem? Regards
  7. Hi,experts, I am now running into one problem about VCS. Now give a simple descripton about it, I use VCS201209 to compile pieces of verification code, there is no any compiling error,but run time error appears. The code is as follows: 1868 //pcie_item.first_be = {{(length % `DW_BYTE_COUNT){1'b1}}, {(`FDW_BE_WIDTH - (length % `DW_BYTE_COUNT)){1'b0}}}; // change because of the run time error 1869 if ((`FDW_BE_WIDTH - (length % `DW_BYTE_COUNT)) == 0) begin 1870 pcie_item.first_be = {(length % `DW_BYTE_COUNT){1'b1}}; 1871 end 1872 else begin 1873 pcie_item.first_be = {{(length % `DW_BYTE_COUNT){1'b1}}, {(`FDW_BE_WIDTH - (length % `DW_BYTE_COUNT)){1'b0}}}; 1874 end `DW_BYTE_COUNT=4; `FDW_BE_WIDTH=4, length is one bit_stream type variable. line 1868 has been commented, changed to line 1869-1874. The reason why i change it is that there is such a run time error: ../sv/04_ref_model/ref_model.sv, line 1868: ** OTENF: S QOP_CONCAT (S,S) /* {} */ Note: OTENF is an internal error meaning Op_Table Entry Not Found Assertion failed " Note: Set environment variable VCS_REPORT_ALL_OTENF to get all the OPTENF errors." at line 711 in file fun.c An unexpected termination has occurred in /EDA_Tools/synopsys/vcs1209/linux/bin/vcs1 at ../sv/04_ref_model/ref_model.sv, 1730 During Codegen During Pass2 Module vcs_paramclassrepository Module vcs_paramclassrepository --- Stack trace follows: [Thread debugging using libthread_db enabled] [New Thread 0xf7be9bb0 (LWP 24498)] 0xffffe405 in __kernel_vsyscall () Thread 2 (Thread 0xf7be9bb0 (LWP 24498)): #0 0xffffe405 in __kernel_vsyscall () #1 0x00aebb26 in pthread_cond_wait@@GLIBC_2.3.2 () from /lib/tls/libpthread.so.0 #2 0x0aee7e64 in ?? () #3 0x00ae9371 in start_thread () from /lib/tls/libpthread.so.0 #4 0x00a41ffe in clone () from /lib/tls/libc.so.6 Backtrace stopped: Not enough registers or memory available to unwind further Thread 1 (Thread 0xf7fd2700 (LWP 24497)): #0 0xffffe405 in __kernel_vsyscall () #1 0x00a0447b in waitpid () from /lib/tls/libc.so.6 #2 0x009ae349 in do_system () from /lib/tls/libc.so.6 #3 0x009ae6c1 in system () from /lib/tls/libc.so.6 #4 0x00aef78d in system () from /lib/tls/libpthread.so.0 #5 0x0b3bc389 in tracker::StackAnnotator::getGdbOutput(char const*, char const*, char const*) () #6 0x0b3bd677 in tracker::StackAnnotator::dumpProcessStack(unsigned int, char const*, char const*) () #7 0x0b3b29c6 in dumpStackTrace () #8 0x0b3b74e7 in vcsAssertNoReturn () #9 0x08fbbf0d in ?? () #10 0x08fbc1c8 in BuildFUNsForRout () #11 0x0907ff8c in BuildMOPsForRout () #12 0x08f4e069 in ?? () #13 0x08f4f12e in ?? () #14 0x08f52423 in CodeGenC () #15 0x09187f31 in Phase234 () #16 0x08806fba in ?? () #17 0x088214ab in ?? () #18 0x088238ee in DoPass2 () #19 0x0876b5ab in doGAToPass2 () #20 0x0876be7a in c_main () #21 0x09293842 in main () Completed context dump phase location* 'Module' 'Module' CPU time: 33.817 seconds to compile make: *** [comp] Error 255 I have done the error analysis, my concept is that maybe the reason is that the value of `FDW_BE_WIDTH - (length % `DW_BYTE_COUNT) has the possibility of zero. So I add the judge condition about the value of `FDW_BE_WIDTH - (length % `DW_BYTE_COUNT), but it still reports the same error about line 1873. If I comment line 1873, the error disappears. It seems like that the problem has something to do with the action of compiler's analyzing the code. Could any expert give me some information? Thanks in advance.
  8. Hi,experts, I am now running into one problem about VCS. Now give a simple descripton about it, I use VCS201209 to compile pieces of verification code, there is no any compiling error,but run time error appears. The code is as follows: 1868 //pcie_item.first_be = {{(length % `DW_BYTE_COUNT){1'b1}}, {(`FDW_BE_WIDTH - (length % `DW_BYTE_COUNT)){1'b0}}}; // change because of the run time error 1869 if ((`FDW_BE_WIDTH - (length % `DW_BYTE_COUNT)) == 0) begin 1870 pcie_item.first_be = {(length % `DW_BYTE_COUNT){1'b1}}; 1871 end 1872 else begin 1873 pcie_item.first_be = {{(length % `DW_BYTE_COUNT){1'b1}}, {(`FDW_BE_WIDTH - (length % `DW_BYTE_COUNT)){1'b0}}}; 1874 end `DW_BYTE_COUNT=4; `FDW_BE_WIDTH=4, length is one bit_stream type variable. line 1868 has been commented, changed to line 1869-1874. The reason why i change it is that there is such a run time error: ../sv/04_ref_model/ref_model.sv, line 1868: ** OTENF: S QOP_CONCAT (S,S) /* {} */ Note: OTENF is an internal error meaning Op_Table Entry Not Found Assertion failed " Note: Set environment variable VCS_REPORT_ALL_OTENF to get all the OPTENF errors." at line 711 in file fun.c An unexpected termination has occurred in /EDA_Tools/synopsys/vcs1209/linux/bin/vcs1 at ../sv/04_ref_model/ref_model.sv, 1730 During Codegen During Pass2 Module vcs_paramclassrepository Module vcs_paramclassrepository --- Stack trace follows: [Thread debugging using libthread_db enabled] [New Thread 0xf7be9bb0 (LWP 24498)] 0xffffe405 in __kernel_vsyscall () Thread 2 (Thread 0xf7be9bb0 (LWP 24498)): #0 0xffffe405 in __kernel_vsyscall () #1 0x00aebb26 in pthread_cond_wait@@GLIBC_2.3.2 () from /lib/tls/libpthread.so.0 #2 0x0aee7e64 in ?? () #3 0x00ae9371 in start_thread () from /lib/tls/libpthread.so.0 #4 0x00a41ffe in clone () from /lib/tls/libc.so.6 Backtrace stopped: Not enough registers or memory available to unwind further Thread 1 (Thread 0xf7fd2700 (LWP 24497)): #0 0xffffe405 in __kernel_vsyscall () #1 0x00a0447b in waitpid () from /lib/tls/libc.so.6 #2 0x009ae349 in do_system () from /lib/tls/libc.so.6 #3 0x009ae6c1 in system () from /lib/tls/libc.so.6 #4 0x00aef78d in system () from /lib/tls/libpthread.so.0 #5 0x0b3bc389 in tracker::StackAnnotator::getGdbOutput(char const*, char const*, char const*) () #6 0x0b3bd677 in tracker::StackAnnotator::dumpProcessStack(unsigned int, char const*, char const*) () #7 0x0b3b29c6 in dumpStackTrace () #8 0x0b3b74e7 in vcsAssertNoReturn () #9 0x08fbbf0d in ?? () #10 0x08fbc1c8 in BuildFUNsForRout () #11 0x0907ff8c in BuildMOPsForRout () #12 0x08f4e069 in ?? () #13 0x08f4f12e in ?? () #14 0x08f52423 in CodeGenC () #15 0x09187f31 in Phase234 () #16 0x08806fba in ?? () #17 0x088214ab in ?? () #18 0x088238ee in DoPass2 () #19 0x0876b5ab in doGAToPass2 () #20 0x0876be7a in c_main () #21 0x09293842 in main () Completed context dump phase location* 'Module' 'Module' CPU time: 33.817 seconds to compile make: *** [comp] Error 255 I have done the error analysis, my concept is that maybe the reason is that the value of `FDW_BE_WIDTH - (length % `DW_BYTE_COUNT) has the possibility of zero. So I add the judge condition about the value of `FDW_BE_WIDTH - (length % `DW_BYTE_COUNT), but it still reports the same error about line 1873. If I comment line 1873, the error disappears. It seems like that the problem has something to do with the action of compiler's analyzing the code. Could any expert give me some information? Thanks in advance.
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