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Found 8 results

  1. veeresh k

    fifo waveform tracing

    Hey everyone, I am trying to trace out the wave for the input and the output. I have tried for different ways,but not getting the desired results. One of the way was,i created 2 same signals with diff. name in testbench file and tried to trace ,but i was not successful in doing so. Any suggestions to do? Thank you. 🙂 Ps:- I have attached the code through which m trying to trace.Plz,help me out with this.I have modified the code according to the errors,So thats the reason for using namespace sc::core while declaring fifo tracing input. ///////////////////////////////////////////// using namespace sc_dt; int sc_main(int, char* []) { sc_core::sc_fifo_out<int> output1; sc_core::sc_fifo_in<int> input1; //create the instance of the example example eg1("example_inst"); eg1.fifo(input1); eg1.fifo(output1); sc_trace_file*tf=sc_create_vcd_trace_file("fi"); sc_trace(tf,input1,"input"); sc_trace(tf,output1,"output"); sc_start(); if(not sc_end_of_simulation_invoked()) { sc_stop; } sc_close_vcd_trace_file(tf); return 0; }
  2. Jean Thevonet

    How to compare VCD files

    Dear users, I'd like to compare the vcd output of differnt versions of our prototype. Is there some kind of vcd diff available ? Graphically ? Regards, Jean
  3. MikeStrom

    Hierarchical vcd dumps

    Hi, I'm new to SystemC, but have worked with Verilator/C++ for quite a while. We are now moving to Verilator/SystemC and have problems creating hierarchical vcd dumps from SystemC native vcd generation. The only hint i got from the documentation is to use dots to separate hierarchical levels, but it does not create a hierarchy in the vcd files. I attached two screen dumps from gtkwave. The first one is a vcd generated from Verilator, the second is a vcd generated from SystemC. Any suggestions are most welcome. Regards, Mike
  4. Hi to everybody, I am new to the SystemC world and I have some difficulties. I am trying to create a vcd file where I can see all my signals. The program compiles without any errors however the vcd file is not created in the project folder or anywhere else. Any ideas? Thank you in advance.
  5. Hi, I am getting errors like below: Trace ERROR: No traces can be added once simulation has started. To add traces, create a new vcd trace file. Code of memory.cpp corresponding to error: Memory::Memory(sc_core::sc_module_name name, unsigned int size) : sc_module(name), m_size(size) { tf = sc_core::sc_create_vcd_trace_file("trace_data1"); // tracing, trace file creation tf->set_time_unit(10, sc_core::SC_US); storage = new ensitlm::data_t[size/sizeof(ensitlm::data_t)]; } // Destructor Memory::~Memory() { // close trace file sc_close_vcd_trace_file(tf); delete [] storage; } // Read transactions tlm::tlm_response_status Memory::read(ensitlm::addr_t a, ensitlm::data_t& d) { // Check if the address is within memory bounds if (a >= m_size) { sleep(5); return tlm::TLM_ADDRESS_ERROR_RESPONSE; } else { d = storage[a/sizeof(ensitlm::data_t)]; sc_trace(tf, d ,"d"); return tlm::TLM_OK_RESPONSE; } } // Write transactions tlm::tlm_response_status Memory::write(ensitlm::addr_t a, ensitlm::data_t d) { // Check if the address is within memory bounds if (a >= m_size) { sleep(5); return tlm::TLM_ADDRESS_ERROR_RESPONSE; } else { storage[a/sizeof(ensitlm::data_t)] = d; return tlm::TLM_OK_RESPONSE; } } code of memory.h : SC_MODULE(Memory) { ensitlm::target_socket<Memory> target; sc_core::sc_trace_file *tf; Memory(sc_core::sc_module_name name, unsigned int size); ~Memory(); tlm::tlm_response_status read(ensitlm::addr_t a, ensitlm::data_t& d); tlm::tlm_response_status write(ensitlm::addr_t a, ensitlm::data_t d); private: unsigned int m_size; public: /* The loader must have access to the storage */ ensitlm::data_t* storage; }; #endif Please tell me the reasons behind these errors Regards Hakimelectronics
  6. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1); } } //JK_FlipFlop.h #include "systemc.h" SC_MODULE(JK_FlipFlop) { sc_in<bool> Input_J; sc_in<bool> Input_K; sc_in<bool> Input_clk; sc_out<bool> Output_q1; sc_out<bool> Output_q2; void do_jk(); SC_CTOR(JK_FlipFlop) { SC_METHOD(do_jk); sensitive<< Input_clk.neg() << Input_J << Input_K; Output_q1.initialize(0); Output_q2.initialize(1); } }; //JK_FlipFlop.cpp #include "JK_FlipFlop.h" void JK_FlipFlop::do_jk() { if(Input_J == true && Input_K == false) { Output_q1.write(1); Output_q2.write(0); } else if(Input_J == false && Input_K == true) { Output_q1.write(0); Output_q2.write(1); } else if(Input_J == true && Input_K == true) { Output_q1.write(!Output_q1); Output_q2.write(!Output_q2); } else { Output_q1.write(Output_q1); Output_q2.write(Output_q2); } } //counter.h #include "JK_FlipFlop.h" SC_MODULE(counter) { sc_in<bool> clk, go; sc_out<unsigned char> value; sc_signal<bool> connect1; sc_signal<bool> connect2; sc_signal<bool> connect3; sc_signal<bool> connect4; sc_signal<bool> connect5; sc_signal<bool> connect6; sc_signal<bool> connect7; sc_signal<bool> connect8; sc_signal<bool> no1, no2, no3, no4, no5, no6, no7, no8; JK_FlipFlop *FF1; JK_FlipFlop *FF2; JK_FlipFlop *FF3; JK_FlipFlop *FF4; JK_FlipFlop *FF5; JK_FlipFlop *FF6; JK_FlipFlop *FF7; JK_FlipFlop *FF8; void do_count(); SC_CTOR(counter) { FF1 = new JK_FlipFlop("jk1"); FF2 = new JK_FlipFlop("jk2"); FF3 = new JK_FlipFlop("jk3"); FF4 = new JK_FlipFlop("jk4"); FF5 = new JK_FlipFlop("jk5"); FF6 = new JK_FlipFlop("jk6"); FF7 = new JK_FlipFlop("jk7"); FF8 = new JK_FlipFlop("jk8"); FF1->Input_clk(clk); FF1->Input_J(go); FF1->Input_K(go); FF1->Output_q1(connect1); FF1->Output_q2(no1); FF2->Input_clk(connect1); FF2->Input_J(go); FF2->Input_K(go); FF2->Output_q1(connect2); FF2->Output_q2(no2); FF3->Input_clk(connect2); FF3->Input_J(go); FF3->Input_K(go); FF3->Output_q1(connect3); FF3->Output_q2(no3); FF4->Input_clk(connect3); FF4->Input_J(go); FF4->Input_K(go); FF4->Output_q1(connect4); FF4->Output_q2(no4); FF5->Input_clk(connect4); FF5->Input_J(go); FF5->Input_K(go); FF5->Output_q1(connect5); FF5->Output_q2(no5); FF6->Input_clk(connect5); FF6->Input_J(go); FF6->Input_K(go); FF6->Output_q1(connect6); FF6->Output_q2(no6); FF7->Input_clk(connect6); FF7->Input_J(go); FF7->Input_K(go); FF7->Output_q1(connect7); FF7->Output_q2(no7); FF8->Input_clk(connect7); FF8->Input_J(go); FF8->Input_K(go); FF8->Output_q1(connect8); FF8->Output_q2(no8); SC_METHOD(do_count); sensitive << clk; sensitive << go; } }; //counter.cpp #include "counter.h" void counter::do_count() { unsigned char local_value = 0; local_value |= (FF1->Output_q1)<<0; local_value |= (FF2->Output_q1)<<1; local_value |= (FF3->Output_q1)<<2; local_value |= (FF4->Output_q1)<<3; local_value |= (FF5->Output_q1)<<4; local_value |= (FF6->Output_q1)<<5; local_value |= (FF7->Output_q1)<<6; local_value |= (FF8->Output_q1)<<7; value.write(local_value); } //main.cpp #include "counter.h" #include "test.h" int sc_main(int argc, char* argv[]) { sc_signal<unsigned char> Value; sc_signal<bool> Go; sc_clock CLK("clock", 50, SC_NS); counter COUNTER("ccc"); COUNTER.clk(CLK); COUNTER.go(Go); COUNTER.value(Value); test TST("TST"); TST.clock(CLK); TST.go(Go); sc_trace_file *tf = sc_create_vcd_trace_file("wave"); sc_trace(tf, COUNTER.connect1, "jk1"); sc_trace(tf, COUNTER.connect2, "jk2"); sc_trace(tf, COUNTER.connect3, "jk3"); sc_trace(tf, COUNTER.connect4, "jk4"); sc_trace(tf, COUNTER.connect5, "jk5"); sc_trace(tf, COUNTER.connect6, "jk6"); sc_trace(tf, COUNTER.connect7, "jk7"); sc_trace(tf, COUNTER.connect8, "jk8"); sc_trace(tf, CLK, "clock"); sc_trace(tf, Value, "SystemC value"); sc_start(20000, SC_NS); sc_close_vcd_trace_file(tf); return(0); } test is making signal always true jk flip-flop working only falling edge so I'm using clk.neg() counter have 8 flip-flop. first flip-flop clock accept main clock and second flip flop accept first flip-flop's q1 value the other flip-flop connected same way to second flip-flop is there any problem?? I can't find any problem but I can't see anything in GTKwave please tell me why. I need your help (P.S : Actually I can't speaking English very well. so please understand I'm using wrong grammar or vocabulary. Thanks)
  7. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1); } } //JK_FlipFlop.h #include "systemc.h" SC_MODULE(JK_FlipFlop) { sc_in<bool> Input_J; sc_in<bool> Input_K; sc_in<bool> Input_clk; sc_out<bool> Output_q1; sc_out<bool> Output_q2; void do_jk(); SC_CTOR(JK_FlipFlop) { SC_METHOD(do_jk); sensitive<< Input_clk.neg() << Input_J << Input_K; Output_q1.initialize(0); Output_q2.initialize(1); } }; //JK_FlipFlop.cpp #include "JK_FlipFlop.h" void JK_FlipFlop::do_jk() { if(Input_J == true && Input_K == false) { Output_q1.write(1); Output_q2.write(0); } else if(Input_J == false && Input_K == true) { Output_q1.write(0); Output_q2.write(1); } else if(Input_J == true && Input_K == true) { Output_q1.write(!Output_q1); Output_q2.write(!Output_q2); } else { Output_q1.write(Output_q1); Output_q2.write(Output_q2); } } //counter.h #include "JK_FlipFlop.h" SC_MODULE(counter) { sc_in<bool> clk, go; sc_out<unsigned char> value; sc_signal<bool> connect1; sc_signal<bool> connect2; sc_signal<bool> connect3; sc_signal<bool> connect4; sc_signal<bool> connect5; sc_signal<bool> connect6; sc_signal<bool> connect7; sc_signal<bool> connect8; sc_signal<bool> no1, no2, no3, no4, no5, no6, no7, no8; JK_FlipFlop *FF1; JK_FlipFlop *FF2; JK_FlipFlop *FF3; JK_FlipFlop *FF4; JK_FlipFlop *FF5; JK_FlipFlop *FF6; JK_FlipFlop *FF7; JK_FlipFlop *FF8; void do_count(); SC_CTOR(counter) { FF1 = new JK_FlipFlop("jk1"); FF2 = new JK_FlipFlop("jk2"); FF3 = new JK_FlipFlop("jk3"); FF4 = new JK_FlipFlop("jk4"); FF5 = new JK_FlipFlop("jk5"); FF6 = new JK_FlipFlop("jk6"); FF7 = new JK_FlipFlop("jk7"); FF8 = new JK_FlipFlop("jk8"); FF1->Input_clk(clk); FF1->Input_J(go); FF1->Input_K(go); FF1->Output_q1(connect1); FF1->Output_q2(no1); FF2->Input_clk(connect1); FF2->Input_J(go); FF2->Input_K(go); FF2->Output_q1(connect2); FF2->Output_q2(no2); FF3->Input_clk(connect2); FF3->Input_J(go); FF3->Input_K(go); FF3->Output_q1(connect3); FF3->Output_q2(no3); FF4->Input_clk(connect3); FF4->Input_J(go); FF4->Input_K(go); FF4->Output_q1(connect4); FF4->Output_q2(no4); FF5->Input_clk(connect4); FF5->Input_J(go); FF5->Input_K(go); FF5->Output_q1(connect5); FF5->Output_q2(no5); FF6->Input_clk(connect5); FF6->Input_J(go); FF6->Input_K(go); FF6->Output_q1(connect6); FF6->Output_q2(no6); FF7->Input_clk(connect6); FF7->Input_J(go); FF7->Input_K(go); FF7->Output_q1(connect7); FF7->Output_q2(no7); FF8->Input_clk(connect7); FF8->Input_J(go); FF8->Input_K(go); FF8->Output_q1(connect8); FF8->Output_q2(no8); SC_METHOD(do_count); sensitive << clk; sensitive << go; } }; //counter.cpp #include "counter.h" void counter::do_count() { unsigned char local_value = 0; local_value |= (FF1->Output_q1)<<0; local_value |= (FF2->Output_q1)<<1; local_value |= (FF3->Output_q1)<<2; local_value |= (FF4->Output_q1)<<3; local_value |= (FF5->Output_q1)<<4; local_value |= (FF6->Output_q1)<<5; local_value |= (FF7->Output_q1)<<6; local_value |= (FF8->Output_q1)<<7; value.write(local_value); } //main.cpp #include "counter.h" #include "test.h" int sc_main(int argc, char* argv[]) { sc_signal<unsigned char> Value; sc_signal<bool> Go; sc_clock CLK("clock", 50, SC_NS); counter COUNTER("ccc"); COUNTER.clk(CLK); COUNTER.go(Go); COUNTER.value(Value); test TST("TST"); TST.clock(CLK); TST.go(Go); sc_trace_file *tf = sc_create_vcd_trace_file("wave"); sc_trace(tf, COUNTER.connect1, "jk1"); sc_trace(tf, COUNTER.connect2, "jk2"); sc_trace(tf, COUNTER.connect3, "jk3"); sc_trace(tf, COUNTER.connect4, "jk4"); sc_trace(tf, COUNTER.connect5, "jk5"); sc_trace(tf, COUNTER.connect6, "jk6"); sc_trace(tf, COUNTER.connect7, "jk7"); sc_trace(tf, COUNTER.connect8, "jk8"); sc_trace(tf, CLK, "clock"); sc_trace(tf, Value, "SystemC value"); sc_start(20000, SC_NS); sc_close_vcd_trace_file(tf); return(0); } test is making signal always true jk flip-flop working only falling edge so I'm using clk.neg() counter have 8 flip-flop. first flip-flop clock accept main clock and second flip flop accept first flip-flop's q1 value the other flip-flop connected same way to second flip-flop is there any problem?? I can't find any problem but I can't see anything in GTKwave please tell me why. I need your help (P.S : Actually I can't speaking English very well. so please understand I'm using wrong grammar or vocabulary. Thanks)
  8. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1); } } //JK_FlipFlop.h #include "systemc.h" SC_MODULE(JK_FlipFlop) { sc_in<bool> Input_J; sc_in<bool> Input_K; sc_in<bool> Input_clk; sc_out<bool> Output_q1; sc_out<bool> Output_q2; void do_jk(); SC_CTOR(JK_FlipFlop) { SC_METHOD(do_jk); sensitive<< Input_clk.neg() << Input_J << Input_K; Output_q1.initialize(0); Output_q2.initialize(1); } }; //JK_FlipFlop.cpp #include "JK_FlipFlop.h" void JK_FlipFlop::do_jk() { if(Input_J == true && Input_K == false) { Output_q1.write(1); Output_q2.write(0); } else if(Input_J == false && Input_K == true) { Output_q1.write(0); Output_q2.write(1); } else if(Input_J == true && Input_K == true) { Output_q1.write(!Output_q1); Output_q2.write(!Output_q2); } else { Output_q1.write(Output_q1); Output_q2.write(Output_q2); } } //counter.h #include "JK_FlipFlop.h" SC_MODULE(counter) { sc_in<bool> clk, go; sc_out<unsigned char> value; sc_signal<bool> connect1; sc_signal<bool> connect2; sc_signal<bool> connect3; sc_signal<bool> connect4; sc_signal<bool> connect5; sc_signal<bool> connect6; sc_signal<bool> connect7; sc_signal<bool> connect8; sc_signal<bool> no1, no2, no3, no4, no5, no6, no7, no8; JK_FlipFlop *FF1; JK_FlipFlop *FF2; JK_FlipFlop *FF3; JK_FlipFlop *FF4; JK_FlipFlop *FF5; JK_FlipFlop *FF6; JK_FlipFlop *FF7; JK_FlipFlop *FF8; void do_count(); SC_CTOR(counter) { FF1 = new JK_FlipFlop("jk1"); FF2 = new JK_FlipFlop("jk2"); FF3 = new JK_FlipFlop("jk3"); FF4 = new JK_FlipFlop("jk4"); FF5 = new JK_FlipFlop("jk5"); FF6 = new JK_FlipFlop("jk6"); FF7 = new JK_FlipFlop("jk7"); FF8 = new JK_FlipFlop("jk8"); FF1->Input_clk(clk); FF1->Input_J(go); FF1->Input_K(go); FF1->Output_q1(connect1); FF1->Output_q2(no1); FF2->Input_clk(connect1); FF2->Input_J(go); FF2->Input_K(go); FF2->Output_q1(connect2); FF2->Output_q2(no2); FF3->Input_clk(connect2); FF3->Input_J(go); FF3->Input_K(go); FF3->Output_q1(connect3); FF3->Output_q2(no3); FF4->Input_clk(connect3); FF4->Input_J(go); FF4->Input_K(go); FF4->Output_q1(connect4); FF4->Output_q2(no4); FF5->Input_clk(connect4); FF5->Input_J(go); FF5->Input_K(go); FF5->Output_q1(connect5); FF5->Output_q2(no5); FF6->Input_clk(connect5); FF6->Input_J(go); FF6->Input_K(go); FF6->Output_q1(connect6); FF6->Output_q2(no6); FF7->Input_clk(connect6); FF7->Input_J(go); FF7->Input_K(go); FF7->Output_q1(connect7); FF7->Output_q2(no7); FF8->Input_clk(connect7); FF8->Input_J(go); FF8->Input_K(go); FF8->Output_q1(connect8); FF8->Output_q2(no8); SC_METHOD(do_count); sensitive << clk; sensitive << go; } }; //counter.cpp #include "counter.h" void counter::do_count() { unsigned char local_value = 0; local_value |= (FF1->Output_q1)<<0; local_value |= (FF2->Output_q1)<<1; local_value |= (FF3->Output_q1)<<2; local_value |= (FF4->Output_q1)<<3; local_value |= (FF5->Output_q1)<<4; local_value |= (FF6->Output_q1)<<5; local_value |= (FF7->Output_q1)<<6; local_value |= (FF8->Output_q1)<<7; value.write(local_value); } //main.cpp #include "counter.h" #include "test.h" int sc_main(int argc, char* argv[]) { sc_signal<unsigned char> Value; sc_signal<bool> Go; sc_clock CLK("clock", 50, SC_NS); counter COUNTER("ccc"); COUNTER.clk(CLK); COUNTER.go(Go); COUNTER.value(Value); test TST("TST"); TST.clock(CLK); TST.go(Go); sc_trace_file *tf = sc_create_vcd_trace_file("wave"); sc_trace(tf, COUNTER.connect1, "jk1"); sc_trace(tf, COUNTER.connect2, "jk2"); sc_trace(tf, COUNTER.connect3, "jk3"); sc_trace(tf, COUNTER.connect4, "jk4"); sc_trace(tf, COUNTER.connect5, "jk5"); sc_trace(tf, COUNTER.connect6, "jk6"); sc_trace(tf, COUNTER.connect7, "jk7"); sc_trace(tf, COUNTER.connect8, "jk8"); sc_trace(tf, CLK, "clock"); sc_trace(tf, Value, "SystemC value"); sc_start(20000, SC_NS); sc_close_vcd_trace_file(tf); return(0); } test is making signal always true jk flip-flop working only falling edge so I'm using clk.neg() counter have 8 flip-flop. first flip-flop clock accept main clock and second flip flop accept first flip-flop's q1 value the other flip-flop connected same way to second flip-flop is there any problem?? I can't find any problem but I can't see anything in GTKwave please tell me why. I need your help (P.S : Actually I can't speaking English very well. so please understand I'm using wrong grammar or vocabulary. Thanks)
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