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Found 127 results

  1. Hi, I was having few basic doubts regarding tlm,I am using system c again after few months. I wanted to know ,how exactly tlm is being used.I know the basics of system c and was approaching to start with tlm. I had googled to see few of tlm uses,but i was not able to catch up those points. I want to know under this scenario,like if i had modelled a system in system c and was having 5 files,design.cpp,producer.cpp,consumer.cpp,top.cpp,main.cpp .I would have used threads as function and called at particular time and would do the communicvation between modules.But what about tlm,as i had read in tlm we are having initiator and target and there are different types of interface connections which can be used for communication. But my question here would be,how and where would i put those 5 files when commuication mode being used is tlm.Do i need to model producer as initiator & vice versa & use any of the interface method of tlm or what !? Any help would be appreciated a lot. Thank you. Regards, Shubham
  2. shubham_v

    d flipflop output

    Hi, I have came back to system c after 6 months, again. I was trying to solve different basic examples of system c. The code is getting compiled,but i am not able to view the desired output. My output is not at all changing,i am not sure whether my function is getting hit or not. Please have a look at the code below and any help would b appreciated. In code,i have added stimulus first and then monitor to check wheteher my function was getting invoked.Again ,in main file also i passed the input. But from ,nowhere i am getting the output. Please help! https://www.edaplayground.com/x/5qEA Ps:Not only this example,the other examples such as combinational circuits,encoders,decoders. I am facing the same issue with respect to all of them.There must be a common mistake which i am repeating. Thanks & regards, shubham_v
  3. Lynn Garibaldi

    Call for Participation - IEEE P1666

    The IEEE P1666 (SystemC) Working Group is now operating and looking for new members. If your company is a Corporate IEEE member and you use SystemC for your business, think about joining the P1666 Working Group to make the SystemC standard even better. If you have any questions about joining P1666, please contact Jerome Cornet (jerome.cornet@st.com), IEEE SystemC WG Chair, and Jonathan Goldberg (goldberg.j@ieee.org), IEEE representative for SystemC.
  4. Hi, I am learning systemc/TLM2.0, I have a confusions in using the phases, When it comes to AT modeling, BEGIN_REQ and END_REQ are used to write data from initiator to target and BEGIN_RESP and END_RESP are use to read from traget to initiator OR we should split the write to target in 4 different phases and read from target in 4 different phases? I am aware of return path and early completion , i just want to have clearity on usage of request and response phases,
  5. Hi, above image is taken from LRM from section 11.1.2.10, During read command 1.is it 10ns in return path is for the target to perform read from target memory to data_pointer of initiator present in target as a part of generic payload member? if not than when is the actual read happens ? 2.what is target doing from 110ns to 150ns ? 3.how do i interpret 5ns present in return of BEGIN_RESP Please help . 
  6. let's assume there are two classes , A and B and in sc_main i am creating the object of A "only" and in class B i am using sc_find_object(hierarchical name of A) then the result from sc_find_object is sc_object type but class A is sc_module so, i typecast-ed into sc_module but still i am not able to call the Api's of class A inside class B. below code is just psedo code . sorry if there is any mistake . it is just for explaining the scenario. sc_main { A obj=new A("objectA"); } class A: sc_core:: sc_module { public: void fun() { cout<<"Hello world"; } }; class B { public: void function() { sc_core::sc_object* obj = sc_core::sc_find_object("objectA"); sc_core::sc_module* ObjNew ObjNew = dynamic_cast<sc_core::sc_module*> (obj); ObjNew->fun() - i.e fun exist in class B . but it is showing error } }; please help
  7. I am totally new to systemc. i am using gcc 7.3.0. while compiling it says error: std::gets has not been declared... while searching for a solution i found that gcc 4.8 is hugely compatible with c++11... so does i have to download gcc 4.8? any help will be hugely appreciated
  8. Philipp A Hartmann

    Support for C++11/14 in SystemC 2.3.2

    In the SystemC 2.3.2 review thread Ameya Vikram Singh (@AmeyaVS) reported the following observation: I'll open a separate topic to discuss the details.
  9. Hey everyone, As of now , i am reffering textbook "SYSTEM C-FROM THE GROUND UP". I wanted to have the solutions of example problems given in that book. Can anyone,please tell me where can i find them? I am not able to find solutions on the link provided in the textbook. Thanx in advance. Regards, Veeresh K
  10. In my code the variable 'inter' is changing its value by itself whenever, it is read/assigned. Please help void dff(){ cout<<"IN DFF"<<endl; cout<<sc_time_stamp()<<endl; wait(10,SC_NS); cout<<sc_time_stamp()<<endl; while(true){ wait(); cout<<"\nIN = "<<in.read()<<" TIME" <<sc_time_stamp()<<endl; inter.write(in.read()); cout<<"\nInter before wait= "<<inter.read()<<endl; wait(10,SC_NS); out.write(inter.read()); cout<<"\nInter after wait= "<<inter.read()<<endl; cout<<"\nOUT = "<<out.read()<<" TIME" <<sc_time_stamp()<<endl; cout<<"\nIN when outed = "<<in.read()<<endl; } } The Complete Code is at: here Please help. Once you run the progam, the value of inter 'before wait' and 'after wait' in the ouput. Thanks in advance
  11. Hi , I am trying to trace out the wave for the input and the output. I have tried for different ways,but not getting the desired results. One of the way was,i created 2 same signals with diff. name in testbench file and tried to trace ,but i was not successful in doing so. Any suggestions to do? Thank you. ? Ps:- I have attached the code through which m trying to trace.Plz,help me out with this.I have modified the code according to the errors,So thats the reason for using namespace sc::core while declaring fifo tracing input.I am posting full code along with the errors. /////////ERRORS///////////////////////////////////// testbench.cpp: In function 'int sc_main(int, char**)':testbench.cpp:16:18: error: no match for call to '(sc_core::sc_fifo<sc_dt::sc_int<32> >) (sc_core::sc_fifo_in<int>&)'testbench.cpp:17:19: error: no match for call to '(sc_core::sc_fifo<sc_dt::sc_int<32> >) (sc_core::sc_fifo_out<int>&)'testbench.cpp:21:29: error: no matching function for call to 'sc_trace(sc_core::sc_trace_file*&, sc_core::sc_fifo_in<int>&, const char [6])' ////////////////////CODE///////////////////////////// #ifndef EXAMPLE_H #define EXAMPLE_H using namespace sc_dt; typedef sc_int<32> sc_int32; SC_MODULE(example) sc_fifo<sc_int32> fifo; //producer thread void producer_thread(); //consumer thread void consumer_thread(); SC_CTOR(example) : fifo(2) { SC_THREAD(producer_thread); SC_THREAD(consumer_thread); }; }; #endif ///////////////////////////////////////// #include <systemc.h> #include "example.h" using namespace sc_dt; void example::producer_thread() { int unsigned number_of_accesses = 4; for (int i = 0; i < number_of_accesses; i++) { sc_int32 value(i); cout << "[" << sc_time_stamp() << "] writing to FIFO value: " << value << ", free: " << fifo.num_free() << endl; fifo.write(value); cout << "[" << sc_time_stamp() << "] wrote to FIFO value: " << value << endl; wait(1, SC_NS); } } //consumer thread void example::consumer_thread() { sc_int<32> value(0); for (;;) { wait(4, SC_NS); fifo.read(value); cout << "[" << sc_time_stamp() << "] read from FIFO value: " << value << endl; } } ////////////////////////////////////////////////MAIN.CPP//////////////////// #include "systemc.h" #include "example.h" using namespace sc_dt; int sc_main(int, char* []) { sc_core::sc_fifo_out<int> output1; sc_core::sc_fifo_in<int> input1; //create the instance of the example example eg1("example_inst"); eg1.fifo(input1); eg1.fifo(output1); sc_trace_file*tf=sc_create_vcd_trace_file("fi"); sc_trace(tf,input1,"input"); sc_trace(tf,output1,"output"); sc_start(); if(not sc_end_of_simulation_invoked()) { sc_stop; } sc_close_vcd_trace_file(tf); return 0; }
  12. veeresh k

    fifo waveform tracing

    Hey everyone, I am trying to trace out the wave for the input and the output. I have tried for different ways,but not getting the desired results. One of the way was,i created 2 same signals with diff. name in testbench file and tried to trace ,but i was not successful in doing so. Any suggestions to do? Thank you. ? Ps:- I have attached the code through which m trying to trace.Plz,help me out with this.I have modified the code according to the errors,So thats the reason for using namespace sc::core while declaring fifo tracing input. ///////////////////////////////////////////// using namespace sc_dt; int sc_main(int, char* []) { sc_core::sc_fifo_out<int> output1; sc_core::sc_fifo_in<int> input1; //create the instance of the example example eg1("example_inst"); eg1.fifo(input1); eg1.fifo(output1); sc_trace_file*tf=sc_create_vcd_trace_file("fi"); sc_trace(tf,input1,"input"); sc_trace(tf,output1,"output"); sc_start(); if(not sc_end_of_simulation_invoked()) { sc_stop; } sc_close_vcd_trace_file(tf); return 0; }
  13. veeresh k

    fifo example

    Hi. I have taken this example from a book and tried to execute it,But i got few errors. I have compared this code with std 2011 and made changes according to that like using namspace sc_core . I am not able to find a right solution for this one. Can someone plese help me out with this.I have posted the code below along with the error,check it out. Thank you. //error////////// In file included from testbench.cpp:6:0:head1.h: In member function 'void www::woperation()':head1.h:16:9: error: 'class sc_core::sc_port<sc_core::sc_fifo_out_if<int> >' has no member named 'write'In file included from testbench.cpp:7:0:head2.h: In member function 'void rrr::roperation()':head2.h:17:9: error: 'class sc_core::sc_port<sc_core::sc_fifo_in_if<int> >' has no member named 'read'  ////////code///// #include<systemc.h> #include"Head1.h" #include"Head2.h" int sc_main(int argc, char* argv[]) { sc_fifo<int> fifo(10); writer w("writer"); reader r("reader"); w.out(fifo); r.in(fifo); sc_start(-1); return 0; } //header1 #include<systemc.h> SC_MODULE(reader) { sc_port<sc_fifo_in_if<int> > in; void roperation() { int val; while (true) { wait(10, SC_NS) for (int i = 0; i <= 15; i++) { in.read(val); cout << val << endl; } } cout << "Availaible : " << in.num availaible() << endl; } SC_CTOR(writer) { SC_THREAD(woperation); } }; //header2 #include<systemc.h> SC_MODULE(writer) { sc_port<sc_fifo_out_if<int> > out; void woperation() { int val = 0; while (true) { wait(10, SC_NS); for (int i = 0; i <= 20; i++) { out.write(val++); } } } SC_CTOR(writer) { SC_THREAD(woperation); } };
  14. veeresh k

    system c beginner

    Hi, I am new to system c. I am trying to learn it step by step,but getting messed up with arrival of every new topic. Any suggestions for good book ? Currently i am studying system c primer by J.Bhasker. Please, help me out. Thank you.
  15. Hi, It seems I have hit a bug in VCD tracing implementation in SystemC release 2.3.2. Here is the bracktrace captured in GDB: (minimal example available here: https://github.com/AmeyaVS/SystemC_ramblings/tree/dev) as one can observe the exception: SIGFPE in systemc-2.3.2/src/sysc/tracing/sc_trace_file_base.cpp:268 due to divide by zero error. GNU gdb (Ubuntu 8.1-0ubuntu3) 8.1.0.20180409-git Copyright (C) 2018 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "x86_64-linux-gnu". Type "show configuration" for configuration details. For bug reporting instructions, please see: <http://www.gnu.org/software/gdb/bugs/>. Find the GDB manual and other documentation resources online at: <http://www.gnu.org/software/gdb/documentation/>. For help, type "help". Type "apropos word" to search for commands related to "word"... Reading symbols from /home/ameya/Documents/demo/SystemC_ramblings/src/02_adder/build/tests/AdderTest/AdderTest.run...done. (gdb) r Starting program: /home/ameya/Documents/demo/SystemC_ramblings/src/02_adder/build/tests/AdderTest/AdderTest.run [Thread debugging using libthread_db enabled] Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1". SystemC 2.3.2-Accellera --- May 1 2018 16:30:17 Copyright (c) 1996-2017 by all Contributors, ALL RIGHTS RESERVED At time 0 s :: (a, b, cin): 100 (sum, carry_out): 00 At time 0 s :: (a, b, cin): 010 (sum, carry_out): 00 At time 0 s :: (a, b, cin): 110 (sum, carry_out): 10 At time 0 s :: (a, b, cin): 001 (sum, carry_out): 10 At time 0 s :: (a, b, cin): 101 (sum, carry_out): 11 At time 0 s :: (a, b, cin): 011 (sum, carry_out): 10 At time 0 s :: (a, b, cin): 111 (sum, carry_out): 00 At time 0 s :: (a, b, cin): 111 (sum, carry_out): 01 Info: /OSCI/SystemC: Simulation stopped by user. Program received signal SIGFPE, Arithmetic exception. 0x00007ffff7b57799 in sc_core::sc_trace_file_base::timestamp_in_trace_units (this=this@entry=0x5555557a3730, high=@0x7fffffffc658: 93824994651128, low=@0x7fffffffc660: 140737488346560) at /home/ameya/apps/src/systemc/systemc-2.3.2/src/sysc/tracing/sc_trace_file_base.cpp:268 268 unit_type unit_divisor = trace_unit_fs / kernel_unit_fs; (gdb) bt #0 0x00007ffff7b57799 in sc_core::sc_trace_file_base::timestamp_in_trace_units (this=this@entry=0x5555557a3730, high=@0x7fffffffc658: 93824994651128, low=@0x7fffffffc660: 140737488346560) at /home/ameya/apps/src/systemc/systemc-2.3.2/src/sysc/tracing/sc_trace_file_base.cpp:268 #1 0x00007ffff7b5d8a2 in sc_core::vcd_trace_file::get_time_stamp (this=this@entry=0x5555557a3730, now_units_high=@0x7fffffffc658: 93824994651128, now_units_low=@0x7fffffffc660: 140737488346560) at /home/ameya/apps/src/systemc/systemc-2.3.2/src/sysc/tracing/sc_vcd_trace.cpp:2086 #2 0x00007ffff7b5e242 in sc_core::vcd_trace_file::~vcd_trace_file (this=0x5555557a3730, __in_chrg=<optimized out>) at /home/ameya/apps/src/systemc/systemc-2.3.2/src/sysc/tracing/sc_vcd_trace.cpp:2145 #3 0x00007ffff7b5e319 in sc_core::vcd_trace_file::~vcd_trace_file (this=0x5555557a3730, __in_chrg=<optimized out>) at /home/ameya/apps/src/systemc/systemc-2.3.2/src/sysc/tracing/sc_vcd_trace.cpp:2153 #4 0x000055555555cfc1 in sc_main (argc=1, argv=0x5555557a2bf0) at /home/ameya/Documents/demo/SystemC_ramblings/src/02_adder/tests/AdderTest/src/full_adder_main.cpp:37 #5 0x00007ffff7b32e24 in sc_core::sc_elab_and_sim (argc=1, argv=<optimized out>) at /home/ameya/apps/src/systemc/systemc-2.3.2/src/sysc/kernel/sc_main_main.cpp:87 #6 0x00007ffff7097b97 in __libc_start_main (main=0x7ffff7aa1fa0 <main(int, char**)>, argc=1, argv=0x7fffffffddb8, init=<optimized out>, fini=<optimized out>, rtld_fini=<optimized out>, stack_end=0x7fffffffdda8) at ../csu/libc-start.c:310 #7 0x000055555555c08a in _start () (gdb) I seems to happen only when the simulation time is not progressing. One can apply the below patch to branch (dev) available under here for the following sub-directory: https://github.com/AmeyaVS/SystemC_ramblings/tree/dev/src/02_adder diff --git a/src/02_adder/tests/AdderTest/src/driver.cpp b/src/02_adder/tests/AdderTest/src/driver.cpp index e70aea1..26169b7 100644 --- a/src/02_adder/tests/AdderTest/src/driver.cpp +++ b/src/02_adder/tests/AdderTest/src/driver.cpp @@ -7,8 +7,14 @@ void driver::prc_driver() { d_a = pattern[0]; d_b = pattern[1]; d_cin = pattern[2]; - wait(5, sc_core::SC_NS); + //wait(5, sc_core::SC_NS); + wait(sc_core::SC_ZERO_TIME); pattern++; + if (pattern == 0) { + break; + } } + wait(sc_core::SC_ZERO_TIME); + sc_core::sc_stop(); } This behavior is not reproduced in SystemC release 2.3.1a. I will try to debug further and hopefully with probable fix. Regards, Ameya Vikram Singh
  16. Aaron0127

    define sc_main in VS 2017

    Hi, I am new to SystemC, I have installed SystemC 2.3.2 successfully in Visual Studio 2017. The only problem that I have is with sc_main() function. The compiler complained the entry point cannot be found. I understand that the default entry point in VS is int main(). I have read IEEE Std 1666-2011 clause 4.3 about sc_main() and sc_elab_and_sim(). I tried to use following code to start simulation. But it failed. The compiler showed error message: "identifier "sc_eabl_and_sim" is undefined". int main(int arg, char* argv[]) { sc_elab_and_sim(arg, argv); //The rest code for simulation and testbench ... } How do I make sc_main(int arg, char* argv[]) function work in VS 2017? If not possible, how to properly call sc_eabl_and_sim(int arg, char* argv[]) in an int main(int arg, char* argv[]) to start a simulation?
  17. Aaron0127

    SC_METHOD Eception

    Hi, I'm trying to use a SC_METHOD in my simulation. Here is the code: gcrypt::gcrypt(sc_module_name name): gcrypt_base(name) { SC_METHOD(on_clock_update); sensitive << clock; dont_initialize(); }; void gcrypt::on_clock_update() { if (clock.read() == 0) { SC_REPORT_WARNING(name(), "Invalid clock port value of 0"); _ns_per_cycle = 0; return; } _ns_per_cycle = 1e9 / clock.read(); } The gcrypt_base constructor is: gcrypt_base::gcrypt_base(sc_module_name name) : sc_module(name), ... { ... } I get this exception thrown by SC_METHOD: Exception thrown at 0x6FB78281 (vcruntime140d.dll) in SystemCModuleTest.exe: 0xC0000005: Access violation reading location 0x115348EF. I saw the __vfptr value was "Unable to read memory". How to solve this problem? Thanks, Chao
  18. shanh

    sc_thread vs pthread

    Hi, I am new to SystemC. I have two questions. 1) Do sc_thread generates separate Linux thread for each call and what is the difference between the POSIX thread and sc_thread? 2) Why systemC has no parallelization scheme? The SystemC scheduler uses cooperative multitasking and cannot exploit fully the potential of SMP workstation.
  19. Hi I have to use the sc_vector command to pass an array let's say Array[16][16] between the modules. Kindly can you tell me how to write the input side vector at the MODULE A and output side vector at the MODULE B to pass this array. I am beginner and donot know how to use the sc_vector command. Thanks
  20. Hi, I want to run the diagram given below. I am executing the modules with the respective processes but it only execute once and then the loop dies. I am providing the static sensitivity to the processes inside the modules e.g. sensitive<< sig1; and so on. How to make the execution multiple times as mentioned in the STEPS in the Diagram. I need help in running the STEPS multiple times before we proceed to the next step in System C code. Thanks
  21. Hi I am running the Sequence of Modules in the flow like: 1) Memory Module 2) Data fetching to the Weight and Image_Cache Modules 3) Processing_PIXEL_MODULE and so on. But I wanted to go back from Processing_pixel_Module to the Image_Cache Module for Cache refill. Can You help me that how can I achieve this. I wanted to go back to the Image_Cache Module to refill the Cache from the Memory module. thanks.
  22. Hi The TLM_READ_COMMAND IS NOT READING THE DATA ARRAY COMPLETELY. What can be the possible reason. I have allocated an array through malloc command in the memory module. and Then from the second module i am trying to read that array using the TLM_READ_COMMAND but the array is not being read completely and it stops in the mid somewhere. Just not running any further without showing any error. What can be possible reason for this . Thanks
  23. Hi I have to load a floating point data from the binary file and save it in an array inside the MODULE_1 (Memory) and then I wanted to transfer the content of that array from MODULE_1 to Another MODULE_2 (CACHE) through TLM. Can You guide me how to save an array in MODULE_1 (Memory) and transfer the floating point data to another MODULE_2 (Cache) through TLM. I am trying to read the data from CACHE to MEMORY but TLM_GENERIC_PAYLOAD does not access the correct memory address of the array elements to read from and therefore I am just reading some garbage value. A help through sample code is much appreciated. Thanks
  24. // MODULE 1 WRITING THE OUT1 to Value 1 SC_MODULE(MODULE_1){ public: //-------------PORTS DECLARATIONS--------------------------- sc_in<bool> reset; sc_out<bool> out1 ; // ---event sc_event sig_written; public: void Process(); public: SC_CTOR(MODULE_1){ SC_METHOD(Process); sensitive << reset; } void Process() { if (reset == 1) out1.write(1); sig_written.notify(); // to make it runnable within the execution phase and not in the Next delta cycle } }; //---------------------------------------------------------------------------------------------------------- // MODULE 2 READING OUTPUT VALUE FROM MODULE_1 SC_MODULE(MODULE_2){ public: //-------------PORTS DECLARATIONS--------------------------- sc_in<bool> input1; sc_out<bool> out2 ; public: // HOW TO DEFINE EVENT HERE ? // PROCESS void Process(); public: SC_CTOR(MODULE_2){ SC_METHOD(Process); sensitive << input1; } void Process() { bool x; x = input1.read(); // reading the Output Value from Module 1. I want to read here 1 because of output // written in the MODULE_1 is 1 if (x == 1) out2.write(1); // HOW TO USE EVENT HERE ? SHARED EVENT } }; Hi I am outputting One value from MODULE 1 and notifying it through sig_written.notify() event to make it detectable in the same execution phase and not in the next delta cycle. Can You tell me How to use the event in the MODULE_2 to detect this event and read the value immediately without going into next delta cycle. thanks
  25. Hi I have 3 to 4 modules and they have 3 to 4 inputs but to synchronize the timing of inputs as they all have to have specific value only then my THREAD PROCESS should run, I am using value_changed_event inside the THREAD PROCESS of the MODULE by using wait(sig.value_changed_event()). But In some MODULES, I am initializing large arrays and due to this when the value changes then it rerun from the 1st Module to the Last and stops in the mid-way displaying the stack over flow as the exception. What Should be the possible solution for this ? I have Increase the Stack size upto 1Giga but still does not work. Thanks
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