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  1. Hi i write this sample code in this code i connect two register i want to trace bus_out signal that is between two register with VCD view but in VCD view the value of bus_out signal is xxxx while bus_out must be value! the image of VCD is attached // mahbod #include "systemc.h" // define reg 16 bit SC_MODULE (reg16bit) { sc_in <bool> inc,ld,clr; sc_in <sc_lv <16> > in16; sc_out <sc_lv <16> > out16; sc_in <bool> clk; void reg_func (); SC_CTOR (reg16bit) { SC_THREAD (reg_func); sensitive << clk.pos(); } }; // define reg function void reg16bit::reg_func () { while (1) { if (ld) out16 = in16; if (clr) out16 = "0000000000000000"; if(inc) out16 = (sc_lv <16>)(out16.read().to_int()+1); wait (); } } //end define reg 16 bit // defination data path madule SC_MODULE(data_path) { sc_in_clk clk; sc_in < sc_lv <16> > inp; sc_in < bool > ld_ac; sc_in < bool > inc_ac; sc_in < bool > clr_ac; sc_in < bool > ld_inp; sc_in < bool > inc_inp; sc_in < bool > clr_inp; sc_out < sc_lv <16> > outp; sc_out < sc_lv <16> > bus_out; sc_signal< sc_lv <16> > bus; reg16bit *AC; reg16bit *INP; void process() { bus_out = bus.read(); } SC_CTOR(data_path) { AC = new reg16bit ("AC"); AC->inc(inc_ac); AC->ld(ld_ac); AC->clr(clr_ac); AC->in16(bus); AC->out16(outp); AC->clk(clk); INP = new reg16bit ("INP"); INP->inc(inc_inp); INP->ld(ld_inp); INP->clr(clr_inp); INP->in16(inp); INP->out16(bus); INP->clk(clk); } }; SC_MODULE(test_bench) { sc_in_clk clk; sc_out < sc_lv <16> > inp; sc_out < bool > ld_ac; sc_out < bool > inc_ac; sc_out < bool > clr_ac; sc_out < bool > ld_inp; sc_out < bool > inc_inp; sc_out < bool > clr_inp; sc_in < sc_lv <16> > outp; sc_in < sc_lv <16> > bus_out; void process() { while(1) { inp = (sc_lv <16>) "0000000000000110"; wait(); ld_inp = (bool) 1; wait(); ld_inp = (bool) 0; wait(); ld_ac = (bool) 1; wait(); ld_ac = (bool) 0; wait(); inc_ac = (bool) 1; wait(); inc_ac = (bool) 0; wait(); } } SC_CTOR(test_bench) { SC_CTHREAD(process, clk.pos() ); } }; int sc_main(int argc, char* argv[]) { sc_clock clk; sc_signal < sc_lv <16> > inp; sc_signal < bool > ld_ac; sc_signal < bool > inc_ac; sc_signal < bool > clr_ac; sc_signal < bool > ld_inp; sc_signal < bool > inc_inp; sc_signal < bool > clr_inp; sc_signal < sc_lv <16> > outp; sc_signal < sc_lv <16> > bus_out; data_path *data_p; test_bench *tb; data_p = new data_path("data_p"); data_p->clk(clk); data_p->inp(inp); data_p->ld_ac(ld_ac); data_p->inc_ac(inc_ac); data_p->clr_ac(clr_ac); data_p->ld_inp(ld_inp); data_p->inc_inp(inc_inp); data_p->clr_inp(clr_inp); data_p->outp(outp); data_p->bus_out(bus_out); tb = new test_bench ("testBench"); tb->clk(clk); tb->inp(inp); tb->ld_ac(ld_ac); tb->inc_ac(inc_ac); tb->clr_ac(clr_ac); tb->ld_inp(ld_inp); tb->inc_inp(inc_inp); tb->clr_inp(clr_inp); tb->outp(outp); tb->bus_out(bus_out); sc_trace_file *tf; tf = sc_create_vcd_trace_file("BufferTraceFile"); // file extension defaults to ".vcd" sc_trace(tf,clk,"clk"); sc_trace(tf,inp,"inp"); sc_trace(tf,outp,"outp"); sc_trace(tf,ld_ac,"ld_ac"); sc_trace(tf,ld_inp,"ld_inp"); sc_trace(tf,inc_ac,"inc_ac"); sc_trace(tf,inc_inp,"inc_inp"); sc_trace(tf,clr_ac,"clr_ac"); sc_trace(tf,clr_inp,"clr_inp"); sc_trace(tf,bus_out,"bus_out"); sc_start(100); sc_close_vcd_trace_file(tf); return 0; }
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