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Found 2 results

  1. I needed to step thru an enum in a testbench today. As it took me a while to figure out how to do it, I post a small example here. I want to do it without making any assumptions of the values of the enums (values are the default type of int, in this case). Reference: SystemVerilog doc "1800-2012.pdf" Section 6.19 Enumerations module top; //typedef enum {alpha=0, beta=1, gamma=2, delta=3, epsilon=4} greek; //to show default assignments typedef enum {alpha, beta, gamma, delta, epsilon} greek; greek letters2; initial begin $display("****** Walk thru an enumeration example. ***********"); for (greek letters=letters.first(), int walk=0; walk < letters.num(); letters=letters.next(), walk++) begin $display(" %0d *** %0s", letters, letters.name); end end endmodule : top Output: ****** Walk thru an enumeration example. *********** 0 *** alpha 1 *** beta 2 *** gamma 3 *** delta 4 *** epsilon I'm also posting here, because when I am trying to remember how to do something, I find it often easier to find my postings online than an example in my own code. I thought I did this nicely with a foreach loop, but cannot find it, so may be imagining it. I was not keen on having to use variable walk. If someone can show me how to do this with a foreach loop or without using an extra variable, like I did with "walk", please do. Noted failures: for (greek letters=letters.first(); letters!=letters.last(); letters=letters.next()) begin //shows only 0-3 for (greek letters=letters.first(); letters<=(letters.num()-1); letters=letters.next()) begin //neverending loop
  2. How do I display the name string of the UVM_VERBOSITY? I have been using this to report the verbosity level, but it returns an int. m_rh.get_verbosity_level() How would you display the enumerated name as opposed to the enumerated value? I'm looking at section "6.19 Enumerations" of the LRM (1800-2012.pdf) and close, but not there yet, so I punt this question out into the ether. .name() seems like it should be in there somewhere.
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