Jump to content

Search the Community

Showing results for tags 'eln'.



More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • Accellera Systems Initiative
    • Information
    • Announcements
    • In the News
  • SystemC
    • SystemC Language
    • SystemC AMS (Analog/Mixed-Signal)
    • SystemC TLM (Transaction-level Modeling)
    • SystemC Verification (UVM-SystemC, SCV)
    • SystemC CCI (Configuration, Control & Inspection)
    • SystemC Datatypes
  • UVM (Universal Verification Methodology)
    • UVM 2017 - Methodology and BCL Forum
    • UVM SystemVerilog Discussions
    • UVM Simulator Specific Issues
    • UVM Commercial Announcements
    • UVM (Pre-IEEE) Methodology and BCL Forum
    • UVM 1.2 Public Review
  • Portable Stimulus
    • Portable Stimulus Pre-Release Discussion
    • Portable Stimulus 1.0
  • IP-XACT
    • IP-XACT Discussion
  • IEEE 1735/IP Encryption
    • IEEE 1735/IP Encryption Discussion
  • OCP (Open Core Protocol)
  • UCIS (Unified Coverage Interoperability Standard)
  • Commercial Announcements
    • Announcements

Categories

  • SystemC
  • UVM
  • UCIS
  • IEEE 1735/IP Encryption

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests


Biography


Location


Interests


Occupation


Company

Found 3 results

  1. Probably a very simple request, but I'd like to set the timestep of my ELN module. I found the following piece in the Language Reference Manual: "The timestep for every ELN cluster shall be derived from the timestep of a connected TDF cluster or set by the member functions set_timestep or set_max_timestep of an ELN primitive module derived from class sca_eln::sca_module of the corresponding ELN cluster." From this, I understand that it is possible to set the timestep within the ELN module. Right now, I've declared my module with SC_module(<name>). When I simply call set_timestep() I get this error: "'set_timestep' was not declared in this scope" When I call sca_eln::sca_module::set_timestep() I get this error: "cannot call member function 'virtual void sca_core::sca_module::set_timestep(const sca_time&)' without object" When I declare the module as SCA_ELN_MODULE(<name>) (like SCA_TDF_MODULE(<name>)) I get this error: "expected constructor, destructor or type conversion before '(' token" I guess my question is the following: is it possible to set the timestep in an ELN module? If so, how do I do this? Bonus question: I'm trying to find the User's Guide, but I seem to only be able to find the SystemC AMS LRM. If somebody could point me to the User's Guide, that would be very helpful! Thanks a lot in advance! My apologies for the (probably) stupid question.
  2. Lately, I have been dealing with some issues related to the ELN Networks. I am modelling some ELN modules as if they were completely independent, meaning that they can be connected to each other through its terminals no matter what modules it is connected to (considering, of course, the limitations of an ELN network). My problem is that sometimes I would like to have some kind of ELN Cable so I could connect an ELN Node to an ELN Ground (Node Ref), for example. Sounds crazy, but since I am creating a generic way of connecting these modules, sometimes I cannot directly connect a terminal to a ground. So, is there a way to avoid that problem since it is not possible to 'bind' a node? Would be useful to have an ELN Cable? Thanks a lot!
  3. Hi everyone, I have been working with SystemC-AMS lately and having nice results, but now I'm facing some issues with the sca_eln::sca_tdf::sca_vsink module. I created some sc_modules with ELN modules inside. Quite briefly, the final electrical network (which I get from putting those sc_modules together) that I have been having problems with is: ELN: node_ref -> vsource -> node -> vsink -> node -> r -> node -> vsink -> node -> r -> node_ref SC :|-----GENERATOR-----|->|-----------PIPE-----------|->|----------PIPE------------| -> |---SINK---| If understood correctly the sca_eln::sca_tdf::sca_isink module is like a voltage source with v = 0 V, so they should not be connected in parallel. I do not know if the vsink works in a similar way, being a current source, so there should not be two connected in a row. Taking a look at the Users guide it is noted for both modules that "No equation added to the equation system", so I'm not sure if this is a conflict because of what I just mentioned. The error I'm getting is: I would like to know the reason why this is not working, if anyone happen to find any The idea of having vsink's there is because I want to send the value from the electrical network in that spot to a TDF module. I'm not sure if this is ok or is a crazy idea. I hope I explained everything clearly, otherwise, just ask and I'll try to do it better Thanks a lot! Kike
×