Jump to content

Search the Community

Showing results for tags 'adhocconnection'.



More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • Accellera Systems Initiative
    • Information
    • Announcements
    • In the News
  • SystemC
    • SystemC Language
    • SystemC AMS (Analog/Mixed-Signal)
    • SystemC TLM (Transaction-level Modeling)
    • SystemC Verification (UVM-SystemC, SCV)
    • SystemC CCI (Configuration, Control & Inspection)
    • SystemC Datatypes
  • UVM (Universal Verification Methodology)
    • UVM 2017 - Methodology and BCL Forum
    • UVM SystemVerilog Discussions
    • UVM Simulator Specific Issues
    • UVM Commercial Announcements
    • UVM (Pre-IEEE) Methodology and BCL Forum
    • UVM 1.2 Public Review
  • Portable Stimulus
    • Portable Stimulus Pre-Release Discussion
    • Portable Stimulus 1.0
  • IP-XACT
    • IP-XACT Discussion
  • IEEE 1735/IP Encryption
    • IEEE 1735/IP Encryption Discussion
  • OCP (Open Core Protocol)
  • UCIS (Unified Coverage Interoperability Standard)
  • Commercial Announcements
    • Announcements

Categories

  • SystemC
  • UVM
  • UCIS
  • IEEE 1735/IP Encryption

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests


Biography


Location


Interests


Occupation


Company

Found 2 results

  1. Bhargav

    Glue Logics in IPXACT

    Hi, I have a question in how glue logics between two or more ports get represented in IPXACT. Lets say there is an ADHOC Connection between, PORT A of instance A and PORT B of instance B, in such a way that, PORTB is connected as 32'habcd ^ PORTA Like, Instance A: output port A Instance B: input port B Now, on Top file, In SV , I have following glue logic. module Top module A instance A( .A(A) ) module B instance B( .B(32'habcd ^ A) //32'habcd XOR with A ) endmodule Now, in adHoc connection,we genrally, represent two connections with just internalportreferences. How does such glue logics get represented? Thanks in advance.
  2. Previous versions of IPXACT has attributes, 'left' and 'right' inside internalPortReference element of adHocConnection in design IPXACT as shown in the following 4 lines of xml. <spirit:adHocConnection> <spirit:name>....</spirit:name> <spirit:internalPortReference spirit:ComponentRef = "..." spirit:PortRef=".." spirit:left="..." spirit:right="...."/> </spirit:adHocConnection> These attributes basically say that which vector range of port from one component is mapped to another (I assume) However, the same IPXACT with latest schema, while validation gives schema error stating, attribute right/left is not allowed. Even the latest xsd files available with accellera doesn't define these attributes.There must be some means how currently, these multibit adHocConnections are mapped between two components inside an IPXACT-design. What could be the solution for this?
×