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Showing results for tags 'UVM_REG_BLOCK'.
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firstname.lastname@example.org posted a topic in IP-XACT DiscussionHi there IPXACT needs to capture array of registers properly in a design. Currently there is only one tag ''spirit:dim" to represent an array of registers. This does not enable us to capture an array of register effectively. Consider the following cases: 1. An array of registers can be one dimensional with each element offset by offset address 0x10. 2. An Array of multidimensional registers something like this: register_1 -> 0x0 register_1 -> 0x4 register_1 -> 0x10 register_1 -> 0x14 ... likewise Is there any way to capture just the address relationship to an array instance within IP-XACT XML tags? (Without using vendorExtensions tag?) We have not been able to capture the above said information inside IPXACT XML.(using only IP-XACT tags) Requesting thoughts regarding the same. Best regards Balasubramanian G
Hi all, I'm using vendors' tool to generate register models. I wanna know how to describe one address-block is instantiated multiple times in IP-XACT. For example, there are 2~4 instances of the same DMA engine module in my testbench. Which schema can I use to describe this? The further question is how to group address blocks in IP-XACT? For example, I have a bridge-similar module BRDG(have registers) will be instantiated to more than 20 IPs of SOC. I wanna the generated uvm register model combine each BRDG with related IP in one uvm_reg_block. How to describe this in IP-XACT? Currently, i'm using script to deal with this. I want to know if IP-XACT native support this. Thanks
durlov posted a topic in UVM (Pre-IEEE) Methodology and BCL ForumHello All, New here. I am wondering if there is a way to make uvm_reg_block to dump the current values of all the registers in that block to a log file? If not a built-in method, then does anybody have a snippet I could borrow. Thank you!
email@example.com posted a topic in UVM (Pre-IEEE) Methodology and BCL ForumHi there What is the difference between using uvm_reg_block::configure() method and uvm_reg_block::add_hdl_path() methods? These two methods seem to perform the same function with different inputs. ie., They both try to add prefix to the backdoor hdl_path to a UVM_REG_BLOCK. My requirement: A register block has been defined as follows: class BLOCK extends UVM_REG_BLOCK; (1st level inheritance) ... end class SAMPLE_BLOCK extends BLOCK; ... end SAMPLE_BLOCK has 2nd level inheritance with UVM_REG_BLOCK. I wanted to reprogram SAMPLE_BLOCK at different levels of verification hierarchy. Example: SAMPLE_BLOCK instance may be present at "top.abc" in block level verification. SAMPLE_BLOCK has been reused at "top.xxx.abc" in Larger IP level verification. SAMPLE_BLOCK has been reused at "top.yyy.xxx.abc" in Device or Top level verification. Please note that at each higher level hierarchy, new prefix gets added to the hdlpath. ie., 'xxx' gets prefixed in Larger IP level verification and 'yyy' gets prefixed in Device level verification. When I use the add_hdl_path() method, the hdlpath gets linked hierarchically. When I use the configure() method on SAMPLE_BLOCK, the hdlpath doesnot get linked hierarchically. Am I missing something here? What's wrong here? Could this be a bug in UVM_REG? Best regards Balasubramanian G