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Found 27 results

  1. I'm trying to figure out how to get uvm_reg to do register reads over a bus like PCIe, where the read command is decoupled from the read data. In other words, one transaction on the bus is sending the read command to the DUT (a mem_read TLP, in the PCIe example), and then some indeterminate time later, the response to that read comes as another transaction from the DUT back to the testbench (a completion TLP in PCIe). uvm_reg seems to assume the simple case where a sequence can call start_item, finish_item, and then the read data has been placed in the original transaction by the driver. In our agent, the driver is not involved with completions from the DUT at all, the monitor is.
  2. Hello, Inside uvm_reg there is a semaphore called m_atomic. This semaphore protect from write/read from several registers at the same time. I have a sequence that sends an item with write_reg task. When this sequence is being called several times (different instances) while the write aceess was not finished I can't see the item of the new sequence untill the first one is finished. I would like to stop the transaction sometimes when the new sequence arrives. How can I do this? Thanks
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