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Showing results for tags 'default sequence'.
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I am trying to use +uvm_set_default_sequence to set default sequence to an parameterized sequence, but i didn't make it. Can anyone please help and show me what went wrong? The sequence is parameterized like below. class seq_a #(int param = 10) extends uvm_sequence; //`uvm_object_utils(seq_a) `uvm_object_param_utils(seq_a#(param)) function new(string name = "my_seq"); super.new(name); do_not_randomize = 1'b1; // Required for ModelSim set_automatic_phase_objection(1); endfunction task body; uvm_sequence_state_enum state = get_sequence_state(); // In UVM 1.1d: starting_phase.raise_objection(this); `uvm_info("SEQ_A", $sformatf("state is %s", state.name()), UVM_LOW); while ($time < 10us) begin #1us; `uvm_info("SEQ_A", $sformatf("[%d] ping at time %d", param, $time), UVM_LOW); end // In UVM 1.1d: starting_phase.drop_objection(this); endtask endclass And I added +uvm_set_default_sequence=*,main_phase,seq_a#(10) to VCS runtime option. Unfortunately, it went wrong, and log was like below. UVM_INFO @ 0: reporter [RNTST] Running test test... UVM_WARNING @ 0: reporter [UnknownTypeName] find_wrapper_by_name: Type name 'seq_a#(10)' not registered with the factory. UVM_ERROR @ 0: reporter [UVM_CMDLINE_PROC] Invalid type 'seq_a#(10)' provided to +uvm_set_default_sequence UVM_FATAL @ 0: reporter [BUILDERR] stopping due to build errors
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I am trying to run the uvm builtin register sequences. I seem to have broken our usage of them in porting code from a previous project. Q1: In the past, we've started them as default sequences. Is there any way to have an error/warning appear if a 'set', such as the below, is never utilized (or 'get'-ed)? uvm_config_db#(uvm_object_wrapper)::set(this, "*.m_reg_agent.m_seq_reg.main_phase", "default_sequence", uvm_builtin_reg_test_seq::type_id::get()); I've added uvm_top.print_topology(); and uvm_config_db::dump(); and it seems the ::set should be working, but nothing is starting. Q2: Are builtin (base class) sequences automatically "::created" somehow/somewhere? (Creation/new-ing is still necessary when you setup a default sequence, right? Or is there some magic singleton-ness that happens?) Q3: My error of the moment is as follows. Your thoughts are appreciated. UVM_FATAL @ 39990: reporter@@seq [SEQ] neither the item's sequencer nor dedicated sequencer has been supplied to start item in seq always@(posedge clk), ljepson74
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- uvm_builtin_reg_test_seq
- register layer
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