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  1. I have a question which probably is quite stupid. I developed a Software in the Loop framework in SytemC. This framework is supposed to call in specific discrete time instants some modules to execute. For instance suppose we have module A and B. Module A has to be executed every 10 ms and Module B every 20 ms. The execution order has to be first A and then B when both modules have to be executed. I am able to do that by having a coordinator module triggered by a clock of 10 ms. Every module ( module A, B and scheduler) are related with an event. Module A and B they look like this: while(1){ Wait(ev_mod_i) { ... trigger_ev_coordinator }} The coordinator which knows the frequency of each module will notify the correct event to trigger the corresponding module. So for instance for t=10ms the coordinator will be triggered by the clock and it will trigger event_mod_A. Then for t=20ms it will trigger event_mod_A, after module A is finished coordinator will trigger event_mod_B. After module B is also finished, the coordinator will wait for the next clock tick e.t.c Now i would like to insert an AMS model into my system. The desired MoC is continuous TDF. However I can't use statements like event.notify(zerotime) or wait(ev_i) in TDF according to the AMS manual. Moreover TDF modules include a time step by which they are executed. This is something that is not fully desired because i can't find a way to control the TDF modules. Could you please give me any ideas on how I can embed a TDF model into a SystemC framework and at the same time to be able to control when the model has to be executed for a specific clock tick? Probably by doing this I am ruining the whole concept of continuous TDF MoC. If this is right do you have any alternative ideas? Thanks in advance.
  2. Hello, I have a SystemC program encapsulated into a C++ class allowing to interact with a SystemC model. In order to easily call that program from a scripting language, I would like to generate a shared-library containing all my SystemC program and the SystemC library. Is it different from generating a classical C/C++ shared-library? How can you deal with the sc_main required by the SystemC? Can you point me to some documentation about that topic, I didn't find anything about it for SystemC on the internet... Thank you! Regards! J-B
  3. Hello, I am using systemC-2.3.1 which I think has started supporting native windows(x64) build. I have build the library of systemC using the msvc solution file in visual C++ express 2010. The library is generated under x64/Release directory and I didn't get any build error. But while linking this library with my application it throws an error message as follow: systemc.lib<sc_time.obj> : fatal error LNK1112: module machine type 'x64' conflicts with target machine type 'x86'. I am compiling my application with visual studio command prompt. Am I missing here something ?
  4. Hello Everyone, Cadence recently released an update to its UVM multi-language (ML) open architecture library. This version 1.4 is available in the Accellera Upload area at: http://forums.accellera.org/files/file/65-uvm-ml-open-architecture/ For more information, you can see this blog posted at Cadence.com: http://www.cadence.com/Community/blogs/fv/archive/2014/06/03/updates-from-the-uvm-multi-language-ml-front.aspx?postID=1334799 =Adam "ML" Sherilog
  5. I am trying to use an sc_vector of modules with a custom creator to pass constructor arguments. It seems to work and run through the entire program, but at exit causes a segfault. GDB shows that this is due to to sc_vector calling the destructor of the module. I have no dynamically-allocated memory or pointers in the module. Here's the overview: outside of sc_main (global -- but I also tried inside of sc_main): -------------------------- struct create_mod { unsigned int m_arg1; unsigned int m_arg2; create_mod(unsigned int arg1, unsigned int arg2) : m_arg1(arg1), m_arg2(arg2) {} mod* operator()(const char* name, size_t) { return new mod(name, m_arg1, m_arg2); } }; Inside sc_main: --------------------------- unsigned int num_of_mods = 8; unsigned int args1 = 5, args2 = 4; sc_vector<mod> vec_mod("mods"); vec_mod.init(num_of_mods, create_mod(args1, args2)); // ... use vec_mod, bind ports, etc ... return 0; So the program runs, then segfaults at the end with "core dumped". GDB results: Backtracing shows: Note the bit in red. Also note that line 334 is the closing brace of sc_main. Also: As I said, I have no dynamically-allocated memory in the class. I have tried an empty destructor (as well as = default since I'm using C++11) but got the same result. Any ideas? Thanks in advance.
  6. Good day. I am new to SystemC and TLM. Here I am implementing producer-consumer model with a bus and memory model. The synchronization between producer-consumer is done using semaphore. I add DMI feature to the simulation. So the idea is to give producer direct access to the memory region. The same goes for the consumer. What I expect from doing this is to gain faster simulation time. However, at some point of my experiment it shows that using DMI takes longer simulation time. Is this normal to happen? Or I might implement the DMI in the wrong way? Thank you. Best regards, Li.
  7. I need to develop a SystemC model for a new (nonexisting) bus architecture, change it whenever needed and investigate its performance with every change. I do not know how to start on that, there is no tutorials or books that focus on using systemC in practical projects, all that's available is on the language itself. how do I approach this problem? how to start?
  8. Hi All: Get to implement a timer module in SytemC-TLM. And it is at LT level. The Time used for interrupt generation is from sc_time_stamp. My current implementation is using TLM payload event queue, which means the timer caculates the expected wait time for the request and do "notify(x ns)" for the payload event queue. Which the drawback is: 1.When I add the cancel function for a ongoing time request, I can't delete the "time request" from the event queue. I do a workaround like saving some tags when the timeout happened to achieve the "cancel" 2.When I add a stop function for the timer, I also need a tag and did lots of workaround in order to fullfil the stop/re-start function. So, is there any foward way to do this? If i do my own queues instead of using Payload event queue(But I guess I still need to use notify(x ns) in some way), may I somehow delete a ongoing requests? Thanks BR
  9. Hi everybody, I have a simple question (not so sure if the answer is simple too). Is it possible to "pause"/"halt" the simulation temporarily? It would be useful for me in two scenarios: Whenever the simulation reaches a specified point in the code. Just like a breakpoint, but not having the need to use a debugger. So whenever the user presses a key, the simulation goes on. Whenever the simulation reaches a point, where a user needs to send an input. It is similar to the previous one, but the here the user would need to enter an input (int, double, string, etc.). I understand that this may be harder for the simulation. So, any ideas? Is there any sc_pause? I know that there is a sc_halt, but it looks like it works only with threads, which would not be suitable to be called from an AMS module. Thanks a lot! ;-)
  10. I have a platform for native simulation, composed with sc_main.cpp, native_wrapper.cpp, native_wrapper.h, hardware.... I have to implement another CPU but I didn't find a method to make this. Because extern "C" is needed since the software is compiled in C and is linked against native_wrapper.cpp, which is compiled in C++, for this, we call methods of soft in a this manner, using “NativeWrapper::get_instance()->method_name()” below you can see code of sc_main.cpp, native_wrapper.cpp and native_wrapper.h.Thanks for your help code for native_wrapper.h #include "ensitlm.h" #include "native_wrapper.h" /* extern "C" is needed since the software is compiled in C and * is linked against native_wrapper.cpp, which is compiled in C++. */ extern "C" int __start(); extern "C" void __interrupt(); extern "C" void write_mem(uint32_t addr, uint32_t data) { //abort(); // TODO NativeWrapper::get_instance()->write_mem(addr, data); } extern "C" unsigned int read_mem(uint32_t addr) { //abort(); // TODO return NativeWrapper::get_instance()->read_mem(addr); } extern "C" void cpu_relax() { //abort(); // TODO NativeWrapper::get_instance()->cpu_relax(); } extern "C" void wait_for_irq() { //abort(); // TODO NativeWrapper::get_instance()->wait_for_irq(); } NativeWrapper * NativeWrapper::get_instance() { static NativeWrapper * instance = NULL; if (!instance) instance = new NativeWrapper("native_wrapper"); return instance; } NativeWrapper::NativeWrapper(sc_core::sc_module_name name) : sc_module(name), irq("irq") { SC_THREAD(compute); SC_METHOD(interrupt_handler_internal); sensitive << irq ; dont_initialize(); } void NativeWrapper::write_mem(unsigned int addr, unsigned int data) { tlm::tlm_response_status stat = socket.write(addr, data); } unsigned int NativeWrapper::read_mem(unsigned int addr) { //abort(); // TODO uint32_t localbuf; tlm::tlm_response_status stat = socket.read(addr,localbuf); return localbuf; } void NativeWrapper::cpu_relax() { //abort(); // TODO wait(1000, sc_core::SC_MS); /* temps arbitraire */ } void NativeWrapper::wait_for_irq() { if (!interrupt) wait(interrupt_event); interrupt = false; } void NativeWrapper::compute() { //abort(); // TODO __start(); } void NativeWrapper::interrupt_handler_internal() { interrupt = true; interrupt_event.notify(); __interrupt(); } and native_wrapper.h : #ifndef NATIVEWRAPPER_H #define NATIVEWRAPPER_H #ifndef ENSITLM_H #error Please include file "ensitlm.h" #endif SC_MODULE(NativeWrapper) { ensitlm::initiator_socket<NativeWrapper> socket; sc_core::sc_in<bool> irq; private: SC_CTOR(NativeWrapper); public: /* We use a singleton here. This is a limitation since it doesn't allow multiple NativeWrapper instances (multiple CPU in the platform), but it considerably reduces the complexity of Makefiles, hal.h, ... */ static NativeWrapper * get_instance(); void write_mem(unsigned int addr, unsigned int data); unsigned int read_mem(unsigned int addr); void cpu_relax(); void wait_for_irq(); void compute(); void interrupt_handler_internal(); bool interrupt; sc_core::sc_event interrupt_event; }; #endif sc_main.cpp #include "ensitlm.h" #include "native_wrapper.h" #include "memory.h" #include "bus.h" #include "timer.h" #include "vga.h" #include "intc.h" #include "gpio.h" int sc_main(int, char**) { NativeWrapper& cpu = *NativeWrapper::get_instance(); Memory memory("Memory", 0x00100000); Bus bus("bus"); TIMER timer("timer", sc_core::sc_time(20, sc_core::SC_NS)); Vga vga("vga"); Intc intc("intc"); Gpio gpio("gpio"); ......
  11. Hi again! Maybe this is too obvious, but I've been wonderin for a while now and never found the answer (and dared to ask for it ). Is it possible to directly pass whatever comes from an tdf_in port to a tdf_out port? Not only that, is it possible to do it in a sc_module instead of a sca_module? For a better explanation I'll leave a piece of code. Let's say I have: #include <systemc-ams> class some_module : public sc_core::sc_module { public: sca_tdf::sca_in<int> in; sca_tdf::sca_out<int> out; some_module(sc_core::sc_module_name nm); }; Until now I was adding an object, let's call it "tdf_some": #include <systemc-ams> class tdf_some_module : public sca_tdf::sca_module { public: sca_tdf::sca_in<int> in; sca_tdf::sca_out<int> out; tdf_some_module(sc_core::sc_module_name nm) {} void processing() { out.write( in.read() ); } }; Then, in the previous class I would change to: #include <systemc-ams> class some_module : public sc_core::sc_module { public: sca_tdf::sca_in<int> in; sca_tdf::sca_out<int> out; // Add new TDF module tdf_some *ts; some_module(sc_core::sc_module_name nm) { // Instantiate and bind ports ts = new tdf_some("ts"); ts->in(in); ts->out(out); } }; Looks like a very simple question (and I hope so), but I still haven't been able to solve it. Any ideas? Thanks
  12. Hi, I am getting errors like below: Trace ERROR: No traces can be added once simulation has started. To add traces, create a new vcd trace file. Code of memory.cpp corresponding to error: Memory::Memory(sc_core::sc_module_name name, unsigned int size) : sc_module(name), m_size(size) { tf = sc_core::sc_create_vcd_trace_file("trace_data1"); // tracing, trace file creation tf->set_time_unit(10, sc_core::SC_US); storage = new ensitlm::data_t[size/sizeof(ensitlm::data_t)]; } // Destructor Memory::~Memory() { // close trace file sc_close_vcd_trace_file(tf); delete [] storage; } // Read transactions tlm::tlm_response_status Memory::read(ensitlm::addr_t a, ensitlm::data_t& d) { // Check if the address is within memory bounds if (a >= m_size) { sleep(5); return tlm::TLM_ADDRESS_ERROR_RESPONSE; } else { d = storage[a/sizeof(ensitlm::data_t)]; sc_trace(tf, d ,"d"); return tlm::TLM_OK_RESPONSE; } } // Write transactions tlm::tlm_response_status Memory::write(ensitlm::addr_t a, ensitlm::data_t d) { // Check if the address is within memory bounds if (a >= m_size) { sleep(5); return tlm::TLM_ADDRESS_ERROR_RESPONSE; } else { storage[a/sizeof(ensitlm::data_t)] = d; return tlm::TLM_OK_RESPONSE; } } code of memory.h : SC_MODULE(Memory) { ensitlm::target_socket<Memory> target; sc_core::sc_trace_file *tf; Memory(sc_core::sc_module_name name, unsigned int size); ~Memory(); tlm::tlm_response_status read(ensitlm::addr_t a, ensitlm::data_t& d); tlm::tlm_response_status write(ensitlm::addr_t a, ensitlm::data_t d); private: unsigned int m_size; public: /* The loader must have access to the storage */ ensitlm::data_t* storage; }; #endif Please tell me the reasons behind these errors Regards Hakimelectronics
  13. Hi Can anybody please tell me how to write a transactor for an existing System C model? I can write a systemC model as well as a LT TLM model. But i don't know how to interconnect both of them using ports. Any valuable help would be appreciated. Thanks
  14. We are using TLM to pass transactions from SystemVerilog to SystemC. I have two cases where I am stuck. Actually, it is the same case, but I have two angles to my question. 1) Is it possible to still use a TLM setup, but without a transaction type. (I realize that this is contradictory to the acronym.) A c-model has a debug function which takes no input arguments. So, when the SV testbench runs into a problem, it can call this function in the SystemC/c-model. As all of our connections now are sc_port/sc_export, with TLM, I'd like to stick with that flow if possible, rather than adding DPIs/VPIs/(PLIs) or any other mechanism to communicate between languages. However, since the function has no input arguments, I don't need a transaction type. So, is there a way to do a TLM call without a transaction type? (I suppose I could just use another transaction type and ignore the data.) 2) Imagine the above c-model input function that takes no input arguments. Let's say now that the c-model function takes a single integer as its input. So, now I do have a transaction type, but a very simple one. It seems like overkill, but do I still need to define matching .h and .svh (that extends uvm_sequence_item) transcation types and the related do_pack, do_unpack, etc. routines? It seems like overkill. I suspect that I must, if I want to use TLM. (Given that the answer to this question must be, yes, does anyone out there just use a generic grab-bag transaction type for cases like this?) //my thought of passing a transaction which is just an int in sv tb: uvm_blocking_put_port #(int) sb_debug_call1_to_cmodel; in sc c-model public tlm::tlm_blocking_put_if<sc_int <32>> //or smthg like that Any thoughts? I know I just need to refresh myself on DPIs, but answers to the above question are welcome.
  15. Hi everybody! About my model: Here is two different initiators and one target. Initiators makes b_transport to different sockets. first b_transport of each initiator its "req to transition", second - data transition. Could anybody help me to write synch point? My target should will call some behavioral function when all initiators will make "req to transition". Could anybody helps me to change this code? Please, help me! #define SC_INCLUDE_DYNAMIC_PROCESSES #include <systemc.h> #include <tlm.h> #include <tlm_utils\simple_initiator_socket.h> #include <tlm_utils\simple_target_socket.h> SC_MODULE(Initiator) { tlm_utils::simple_initiator_socket<Initiator> socket; void process() { tlm::tlm_generic_payload *trans = new tlm::tlm_generic_payload; sc_time delay = sc_time(10, SC_NS); for(int i =0 ; i < 100; i++) { cout << "Initiator1: send payload with req to target @ " << sc_time_stamp() << endl; socket->b_transport(*trans, delay); if(trans->is_response_ok()) { cout << "Initiator1: Start transaction. Send data @ " << sc_time_stamp() << endl; trans->set_data_ptr(reinterpret_cast<unsigned char*>(&i)); socket->b_transport(*trans, delay); } } } SC_CTOR(Initiator) { SC_THREAD(process); } }; SC_MODULE(Initiator2) { tlm_utils::simple_initiator_socket<Initiator2> socket; void process() { tlm::tlm_generic_payload *trans = new tlm::tlm_generic_payload; sc_time delay = sc_time(0, SC_NS); for(int i =5 ; i < 100; i++) { cout << "Initiator2: send payload with req to target @ " << sc_time_stamp() << endl; socket->b_transport(*trans, delay); if(trans->is_response_ok()) { cout << "Initiator2: Start transaction. Send data @ " << sc_time_stamp() << endl; trans->set_data_ptr(reinterpret_cast<unsigned char*>(&i)); socket->b_transport(*trans, delay); } } } SC_CTOR(Initiator2) { SC_THREAD(process); } }; SC_MODULE(Target) { tlm_utils::simple_target_socket<Target> socket, socket2; bool dataRecievedI1, dataRecoevedI2; virtual void process1(tlm::tlm_generic_payload &tx, sc_time& dt) { if(!dataRecievedI1) { wait(socket->default_event()); } } virtual void process2(tlm::tlm_generic_payload &tx, sc_time& dt) { if(!dataRecoevedI2) { } } SC_CTOR(Target) { dataRecievedI1 = false; dataRecoevedI2 = false; socket.register_b_transport(this, &Target::process1); socket2.register_b_transport(this, &Target::process2); } }; SC_MODULE(Top) { Initiator *initiator; Initiator2 *initiator2; Target *target; SC_CTOR(Top) { initiator = new Initiator ("initiator"); target = new Target ("target"); initiator2 = new Initiator2("initiator2"); initiator->socket.bind(target->socket); initiator2->socket.bind(target->socket2); } }; int sc_main(int argc, char* argv[]) { Top top("top"); sc_start(); getchar(); return 0; }
  16. Hi everyone, I'm met some problem. In box below you can see my code. struct Some_stuct { int data; float data_f; }; class payload_t { public: unsigned char *data; unsigned lenght; inline friend ostream& operator << ( ostream& os, payload_t const & v ) { os << "(" << v.data << "," << std::boolalpha << "," << v.lenght << ")"; return os; } }; SC_MODULE(tx) { sc_port<sc_fifo_out_if<payload_t> > out_port; void process() { Some_stuct data; payload_t out_data; while(true) { data.data = 5; data.data_f = 6; out_data.data = reinterpret_cast<unsigned char*>(&data); out_data.lenght = sizeof(Some_stuct); out_port->write(out_data); data.data++; data.data_f++; wait(1, SC_NS); } } SC_CTOR(tx) { SC_THREAD(process); } }; SC_MODULE(rx) { sc_port<sc_fifo_in_if<payload_t> > in_port; void process() { int realData = 0; payload_t in_data; while(true) { wait(in_port->data_written_event()); wait(171, SC_NS); in_data = in_port->read(); Some_stuct *val = reinterpret_cast<Some_stuct*>(in_data.data); cout << sc_time_stamp() << " " << val->data << " " << val->data_f << endl; } } SC_CTOR(rx) { SC_THREAD(process); } }; int sc_main(int argc, char* argv[]) { rx rx_i("rx"); tx tx_i("tx"); sc_fifo<payload_t> buf(8); tx_i.out_port(buf); rx_i.in_port(buf); sc_start(); getchar(); return 0; } I'm have two blocks: transmitter and receiver. When we call method write to fifo from transmitter, actually we will send address of our local data. And when i will read from buffer, I will receive address of transmitter local data. But if transmitter works more faster than receiver, my rx block will receive "New" data and sended data will loss. How to solve this problem? I should receive correct data
  17. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1); } } //JK_FlipFlop.h #include "systemc.h" SC_MODULE(JK_FlipFlop) { sc_in<bool> Input_J; sc_in<bool> Input_K; sc_in<bool> Input_clk; sc_out<bool> Output_q1; sc_out<bool> Output_q2; void do_jk(); SC_CTOR(JK_FlipFlop) { SC_METHOD(do_jk); sensitive<< Input_clk.neg() << Input_J << Input_K; Output_q1.initialize(0); Output_q2.initialize(1); } }; //JK_FlipFlop.cpp #include "JK_FlipFlop.h" void JK_FlipFlop::do_jk() { if(Input_J == true && Input_K == false) { Output_q1.write(1); Output_q2.write(0); } else if(Input_J == false && Input_K == true) { Output_q1.write(0); Output_q2.write(1); } else if(Input_J == true && Input_K == true) { Output_q1.write(!Output_q1); Output_q2.write(!Output_q2); } else { Output_q1.write(Output_q1); Output_q2.write(Output_q2); } } //counter.h #include "JK_FlipFlop.h" SC_MODULE(counter) { sc_in<bool> clk, go; sc_out<unsigned char> value; sc_signal<bool> connect1; sc_signal<bool> connect2; sc_signal<bool> connect3; sc_signal<bool> connect4; sc_signal<bool> connect5; sc_signal<bool> connect6; sc_signal<bool> connect7; sc_signal<bool> connect8; sc_signal<bool> no1, no2, no3, no4, no5, no6, no7, no8; JK_FlipFlop *FF1; JK_FlipFlop *FF2; JK_FlipFlop *FF3; JK_FlipFlop *FF4; JK_FlipFlop *FF5; JK_FlipFlop *FF6; JK_FlipFlop *FF7; JK_FlipFlop *FF8; void do_count(); SC_CTOR(counter) { FF1 = new JK_FlipFlop("jk1"); FF2 = new JK_FlipFlop("jk2"); FF3 = new JK_FlipFlop("jk3"); FF4 = new JK_FlipFlop("jk4"); FF5 = new JK_FlipFlop("jk5"); FF6 = new JK_FlipFlop("jk6"); FF7 = new JK_FlipFlop("jk7"); FF8 = new JK_FlipFlop("jk8"); FF1->Input_clk(clk); FF1->Input_J(go); FF1->Input_K(go); FF1->Output_q1(connect1); FF1->Output_q2(no1); FF2->Input_clk(connect1); FF2->Input_J(go); FF2->Input_K(go); FF2->Output_q1(connect2); FF2->Output_q2(no2); FF3->Input_clk(connect2); FF3->Input_J(go); FF3->Input_K(go); FF3->Output_q1(connect3); FF3->Output_q2(no3); FF4->Input_clk(connect3); FF4->Input_J(go); FF4->Input_K(go); FF4->Output_q1(connect4); FF4->Output_q2(no4); FF5->Input_clk(connect4); FF5->Input_J(go); FF5->Input_K(go); FF5->Output_q1(connect5); FF5->Output_q2(no5); FF6->Input_clk(connect5); FF6->Input_J(go); FF6->Input_K(go); FF6->Output_q1(connect6); FF6->Output_q2(no6); FF7->Input_clk(connect6); FF7->Input_J(go); FF7->Input_K(go); FF7->Output_q1(connect7); FF7->Output_q2(no7); FF8->Input_clk(connect7); FF8->Input_J(go); FF8->Input_K(go); FF8->Output_q1(connect8); FF8->Output_q2(no8); SC_METHOD(do_count); sensitive << clk; sensitive << go; } }; //counter.cpp #include "counter.h" void counter::do_count() { unsigned char local_value = 0; local_value |= (FF1->Output_q1)<<0; local_value |= (FF2->Output_q1)<<1; local_value |= (FF3->Output_q1)<<2; local_value |= (FF4->Output_q1)<<3; local_value |= (FF5->Output_q1)<<4; local_value |= (FF6->Output_q1)<<5; local_value |= (FF7->Output_q1)<<6; local_value |= (FF8->Output_q1)<<7; value.write(local_value); } //main.cpp #include "counter.h" #include "test.h" int sc_main(int argc, char* argv[]) { sc_signal<unsigned char> Value; sc_signal<bool> Go; sc_clock CLK("clock", 50, SC_NS); counter COUNTER("ccc"); COUNTER.clk(CLK); COUNTER.go(Go); COUNTER.value(Value); test TST("TST"); TST.clock(CLK); TST.go(Go); sc_trace_file *tf = sc_create_vcd_trace_file("wave"); sc_trace(tf, COUNTER.connect1, "jk1"); sc_trace(tf, COUNTER.connect2, "jk2"); sc_trace(tf, COUNTER.connect3, "jk3"); sc_trace(tf, COUNTER.connect4, "jk4"); sc_trace(tf, COUNTER.connect5, "jk5"); sc_trace(tf, COUNTER.connect6, "jk6"); sc_trace(tf, COUNTER.connect7, "jk7"); sc_trace(tf, COUNTER.connect8, "jk8"); sc_trace(tf, CLK, "clock"); sc_trace(tf, Value, "SystemC value"); sc_start(20000, SC_NS); sc_close_vcd_trace_file(tf); return(0); } test is making signal always true jk flip-flop working only falling edge so I'm using clk.neg() counter have 8 flip-flop. first flip-flop clock accept main clock and second flip flop accept first flip-flop's q1 value the other flip-flop connected same way to second flip-flop is there any problem?? I can't find any problem but I can't see anything in GTKwave please tell me why. I need your help (P.S : Actually I can't speaking English very well. so please understand I'm using wrong grammar or vocabulary. Thanks)
  18. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1); } } //JK_FlipFlop.h #include "systemc.h" SC_MODULE(JK_FlipFlop) { sc_in<bool> Input_J; sc_in<bool> Input_K; sc_in<bool> Input_clk; sc_out<bool> Output_q1; sc_out<bool> Output_q2; void do_jk(); SC_CTOR(JK_FlipFlop) { SC_METHOD(do_jk); sensitive<< Input_clk.neg() << Input_J << Input_K; Output_q1.initialize(0); Output_q2.initialize(1); } }; //JK_FlipFlop.cpp #include "JK_FlipFlop.h" void JK_FlipFlop::do_jk() { if(Input_J == true && Input_K == false) { Output_q1.write(1); Output_q2.write(0); } else if(Input_J == false && Input_K == true) { Output_q1.write(0); Output_q2.write(1); } else if(Input_J == true && Input_K == true) { Output_q1.write(!Output_q1); Output_q2.write(!Output_q2); } else { Output_q1.write(Output_q1); Output_q2.write(Output_q2); } } //counter.h #include "JK_FlipFlop.h" SC_MODULE(counter) { sc_in<bool> clk, go; sc_out<unsigned char> value; sc_signal<bool> connect1; sc_signal<bool> connect2; sc_signal<bool> connect3; sc_signal<bool> connect4; sc_signal<bool> connect5; sc_signal<bool> connect6; sc_signal<bool> connect7; sc_signal<bool> connect8; sc_signal<bool> no1, no2, no3, no4, no5, no6, no7, no8; JK_FlipFlop *FF1; JK_FlipFlop *FF2; JK_FlipFlop *FF3; JK_FlipFlop *FF4; JK_FlipFlop *FF5; JK_FlipFlop *FF6; JK_FlipFlop *FF7; JK_FlipFlop *FF8; void do_count(); SC_CTOR(counter) { FF1 = new JK_FlipFlop("jk1"); FF2 = new JK_FlipFlop("jk2"); FF3 = new JK_FlipFlop("jk3"); FF4 = new JK_FlipFlop("jk4"); FF5 = new JK_FlipFlop("jk5"); FF6 = new JK_FlipFlop("jk6"); FF7 = new JK_FlipFlop("jk7"); FF8 = new JK_FlipFlop("jk8"); FF1->Input_clk(clk); FF1->Input_J(go); FF1->Input_K(go); FF1->Output_q1(connect1); FF1->Output_q2(no1); FF2->Input_clk(connect1); FF2->Input_J(go); FF2->Input_K(go); FF2->Output_q1(connect2); FF2->Output_q2(no2); FF3->Input_clk(connect2); FF3->Input_J(go); FF3->Input_K(go); FF3->Output_q1(connect3); FF3->Output_q2(no3); FF4->Input_clk(connect3); FF4->Input_J(go); FF4->Input_K(go); FF4->Output_q1(connect4); FF4->Output_q2(no4); FF5->Input_clk(connect4); FF5->Input_J(go); FF5->Input_K(go); FF5->Output_q1(connect5); FF5->Output_q2(no5); FF6->Input_clk(connect5); FF6->Input_J(go); FF6->Input_K(go); FF6->Output_q1(connect6); FF6->Output_q2(no6); FF7->Input_clk(connect6); FF7->Input_J(go); FF7->Input_K(go); FF7->Output_q1(connect7); FF7->Output_q2(no7); FF8->Input_clk(connect7); FF8->Input_J(go); FF8->Input_K(go); FF8->Output_q1(connect8); FF8->Output_q2(no8); SC_METHOD(do_count); sensitive << clk; sensitive << go; } }; //counter.cpp #include "counter.h" void counter::do_count() { unsigned char local_value = 0; local_value |= (FF1->Output_q1)<<0; local_value |= (FF2->Output_q1)<<1; local_value |= (FF3->Output_q1)<<2; local_value |= (FF4->Output_q1)<<3; local_value |= (FF5->Output_q1)<<4; local_value |= (FF6->Output_q1)<<5; local_value |= (FF7->Output_q1)<<6; local_value |= (FF8->Output_q1)<<7; value.write(local_value); } //main.cpp #include "counter.h" #include "test.h" int sc_main(int argc, char* argv[]) { sc_signal<unsigned char> Value; sc_signal<bool> Go; sc_clock CLK("clock", 50, SC_NS); counter COUNTER("ccc"); COUNTER.clk(CLK); COUNTER.go(Go); COUNTER.value(Value); test TST("TST"); TST.clock(CLK); TST.go(Go); sc_trace_file *tf = sc_create_vcd_trace_file("wave"); sc_trace(tf, COUNTER.connect1, "jk1"); sc_trace(tf, COUNTER.connect2, "jk2"); sc_trace(tf, COUNTER.connect3, "jk3"); sc_trace(tf, COUNTER.connect4, "jk4"); sc_trace(tf, COUNTER.connect5, "jk5"); sc_trace(tf, COUNTER.connect6, "jk6"); sc_trace(tf, COUNTER.connect7, "jk7"); sc_trace(tf, COUNTER.connect8, "jk8"); sc_trace(tf, CLK, "clock"); sc_trace(tf, Value, "SystemC value"); sc_start(20000, SC_NS); sc_close_vcd_trace_file(tf); return(0); } test is making signal always true jk flip-flop working only falling edge so I'm using clk.neg() counter have 8 flip-flop. first flip-flop clock accept main clock and second flip flop accept first flip-flop's q1 value the other flip-flop connected same way to second flip-flop is there any problem?? I can't find any problem but I can't see anything in GTKwave please tell me why. I need your help (P.S : Actually I can't speaking English very well. so please understand I'm using wrong grammar or vocabulary. Thanks)
  19. Hi I'm learning SystemC language and I made a JK flipflop and 8bit counter using 8-JK flipflop there's no problem building project but if I running GTKwave using vcd trace file it cannot show anything. please help me //test.h #include "systemc.h" SC_MODULE(test) { sc_in<bool> clock; sc_out<bool> go; void do_test(); SC_CTOR(test) { SC_CTHREAD(do_test, clock); go.initialize(0); } }; //test.cpp #include "test.h" void test::do_test() { go.write(1); while(true) { wait(1); } } //JK_FlipFlop.h #include "systemc.h" SC_MODULE(JK_FlipFlop) { sc_in<bool> Input_J; sc_in<bool> Input_K; sc_in<bool> Input_clk; sc_out<bool> Output_q1; sc_out<bool> Output_q2; void do_jk(); SC_CTOR(JK_FlipFlop) { SC_METHOD(do_jk); sensitive<< Input_clk.neg() << Input_J << Input_K; Output_q1.initialize(0); Output_q2.initialize(1); } }; //JK_FlipFlop.cpp #include "JK_FlipFlop.h" void JK_FlipFlop::do_jk() { if(Input_J == true && Input_K == false) { Output_q1.write(1); Output_q2.write(0); } else if(Input_J == false && Input_K == true) { Output_q1.write(0); Output_q2.write(1); } else if(Input_J == true && Input_K == true) { Output_q1.write(!Output_q1); Output_q2.write(!Output_q2); } else { Output_q1.write(Output_q1); Output_q2.write(Output_q2); } } //counter.h #include "JK_FlipFlop.h" SC_MODULE(counter) { sc_in<bool> clk, go; sc_out<unsigned char> value; sc_signal<bool> connect1; sc_signal<bool> connect2; sc_signal<bool> connect3; sc_signal<bool> connect4; sc_signal<bool> connect5; sc_signal<bool> connect6; sc_signal<bool> connect7; sc_signal<bool> connect8; sc_signal<bool> no1, no2, no3, no4, no5, no6, no7, no8; JK_FlipFlop *FF1; JK_FlipFlop *FF2; JK_FlipFlop *FF3; JK_FlipFlop *FF4; JK_FlipFlop *FF5; JK_FlipFlop *FF6; JK_FlipFlop *FF7; JK_FlipFlop *FF8; void do_count(); SC_CTOR(counter) { FF1 = new JK_FlipFlop("jk1"); FF2 = new JK_FlipFlop("jk2"); FF3 = new JK_FlipFlop("jk3"); FF4 = new JK_FlipFlop("jk4"); FF5 = new JK_FlipFlop("jk5"); FF6 = new JK_FlipFlop("jk6"); FF7 = new JK_FlipFlop("jk7"); FF8 = new JK_FlipFlop("jk8"); FF1->Input_clk(clk); FF1->Input_J(go); FF1->Input_K(go); FF1->Output_q1(connect1); FF1->Output_q2(no1); FF2->Input_clk(connect1); FF2->Input_J(go); FF2->Input_K(go); FF2->Output_q1(connect2); FF2->Output_q2(no2); FF3->Input_clk(connect2); FF3->Input_J(go); FF3->Input_K(go); FF3->Output_q1(connect3); FF3->Output_q2(no3); FF4->Input_clk(connect3); FF4->Input_J(go); FF4->Input_K(go); FF4->Output_q1(connect4); FF4->Output_q2(no4); FF5->Input_clk(connect4); FF5->Input_J(go); FF5->Input_K(go); FF5->Output_q1(connect5); FF5->Output_q2(no5); FF6->Input_clk(connect5); FF6->Input_J(go); FF6->Input_K(go); FF6->Output_q1(connect6); FF6->Output_q2(no6); FF7->Input_clk(connect6); FF7->Input_J(go); FF7->Input_K(go); FF7->Output_q1(connect7); FF7->Output_q2(no7); FF8->Input_clk(connect7); FF8->Input_J(go); FF8->Input_K(go); FF8->Output_q1(connect8); FF8->Output_q2(no8); SC_METHOD(do_count); sensitive << clk; sensitive << go; } }; //counter.cpp #include "counter.h" void counter::do_count() { unsigned char local_value = 0; local_value |= (FF1->Output_q1)<<0; local_value |= (FF2->Output_q1)<<1; local_value |= (FF3->Output_q1)<<2; local_value |= (FF4->Output_q1)<<3; local_value |= (FF5->Output_q1)<<4; local_value |= (FF6->Output_q1)<<5; local_value |= (FF7->Output_q1)<<6; local_value |= (FF8->Output_q1)<<7; value.write(local_value); } //main.cpp #include "counter.h" #include "test.h" int sc_main(int argc, char* argv[]) { sc_signal<unsigned char> Value; sc_signal<bool> Go; sc_clock CLK("clock", 50, SC_NS); counter COUNTER("ccc"); COUNTER.clk(CLK); COUNTER.go(Go); COUNTER.value(Value); test TST("TST"); TST.clock(CLK); TST.go(Go); sc_trace_file *tf = sc_create_vcd_trace_file("wave"); sc_trace(tf, COUNTER.connect1, "jk1"); sc_trace(tf, COUNTER.connect2, "jk2"); sc_trace(tf, COUNTER.connect3, "jk3"); sc_trace(tf, COUNTER.connect4, "jk4"); sc_trace(tf, COUNTER.connect5, "jk5"); sc_trace(tf, COUNTER.connect6, "jk6"); sc_trace(tf, COUNTER.connect7, "jk7"); sc_trace(tf, COUNTER.connect8, "jk8"); sc_trace(tf, CLK, "clock"); sc_trace(tf, Value, "SystemC value"); sc_start(20000, SC_NS); sc_close_vcd_trace_file(tf); return(0); } test is making signal always true jk flip-flop working only falling edge so I'm using clk.neg() counter have 8 flip-flop. first flip-flop clock accept main clock and second flip flop accept first flip-flop's q1 value the other flip-flop connected same way to second flip-flop is there any problem?? I can't find any problem but I can't see anything in GTKwave please tell me why. I need your help (P.S : Actually I can't speaking English very well. so please understand I'm using wrong grammar or vocabulary. Thanks)
  20. Hi all, I am working with sc_fixed point types in systemc and i tried a small code with the usage of fixedpoint types. #define SC_INCLUDE_FX #include "systemc.h" #include <stdlib.h> //for srand() and rand() SC_MODULE(rand){ sc_out<sc_ufixed<8,8,SC_TRN,SC_SAT> > output; sc_ufixed<8,8,SC_TRN,SC_SAT> A; void process(){ while(true) { wait(19, SC_NS); A=rand() % 254 ; // range 0 to 253 output.write(A); } } SC_CTOR(rand) { SC_THREAD(process); } }; The above code is just a source module which provides the rand numbers in the fixed point format to the next module. But when i compile i am getting the syntax error as "sc_ufixed symbols could not be resolved" Even i defined locally the SC_INCLUDE_FX macro to work with the fixed point types. But i cant figure out what is the syntax problems while working with fixed point types. when i work the same with the integers, it works fine. Note: i am working in ubuntu 12.04 OS in eclipse C++ software. please help me to proceed with a solution
  21. Hi all, i am trying to translate a simulink model to system c module. The simulink block is a source block where it generates random number in the range of [ 0 , 253 ] and with a explicit sample period( the block produces outputs and if appropriate, updates its internal state) of 9 ns, and the output of this block is given to the next block with a latency of 1 sample period. i tried to translate this block to a system c module as shown below: #include "systemc.h" #include <stdlib.h> //for srand(uint) and rand() SC_MODULE(RNG){ sc_in_clk clk; sc_out< sc_uint > output; sc_uint A; void process(){ // while(true) { wait(9, SC_NS); // Timed sampling, based on simulink block sample time A=rand() % 254 ; // do the process wait(9, SC_NS); // delaying the output for 1 latency ie. 1 sample period output.write(A); // then write the output } } SC_CTOR(RNG) { SC_THREAD(process); sensitive<< clk.pos(); } will the above code imitates the simulink model with its specifications as i prescribed? please have a look and let me know how i can proceed for the solution. Thank you.
  22. Hell All, I posted a question entitled "Determining source of events using global fifo" on Sep 9, 2013. Surprisingly, I have not got a reply for this post so far. What is wrong with this post? Any idea? Can anyone see my post? Thanks, Alireza
  23. After Signal/Port binding, when signal changed, the sensitive list will cause SC_METHOD registered method to run. When I'm implementing the SystemC version, I met this warning W571. To be honest, I think this warning is correct because there is no activity. But Why there is no activity where I thought there should be is the question. The problem happens when call sc_start() the second time; I suspect that the binding between signal/port is not handing well. SC_MODULE ( MyClass ) { SC_CTOR(MyClass) { SC_METHOD(eventListener); dont_initialize(); sensitive << m_event; } void eventListener() { Event* event = m_event.read(); ... delete event; } } int sc_main (int argc, char* argv[]) { sc_signal<Event*> eventSubject; MyClass context("CONTEXT"); context.m_event(eventSubject); //bind signal to port, m_event is the port while(true) { getline(cin, in); ... eventSubject = new Event(); sc_start(); } }
  24. Hello, How can i plz define an sc_lv with a variable width ? Thank you for your help
  25. I have designed and developed RTC using systemc language. But there is mismatch between this RTC and original timing? Can anyone tell me the reason for this?
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