mohitnegi

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About mohitnegi

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  1. hi Stephan/Alan, so guys any work around for using c++14 with systemC without " error std::gets is not declared using std::gets" . Thanks
  2. hi , I have updated my gcc compiler to 4.9 version . now when I compile my system C model with g++14 compiler option enabled ,it is giving this error in systemC header file systemc.h 118:16 error std::gets is not declared using std::gets I was not getting this error earlier . I tried building my systemC library with ./configure CXX=g++-4.9 but the same issue comes up .. can anyone help in this ??
  3. Hello guys, well with systemC modelling appoarch is becoming more accurate in recent times .. I wish to discuss here that why do we need to go for synthesizable systemC ... why can't we just replace systemC models in our existing hardware by just an SW update and in area where we can little bit compromise in performance ... thanks guys ...
  4. I have a virtual platform(versatilepb based) which I am using to validate my Universal flash subsystem(UFS) host controller TLM model. From OS, when it issue SCSI command, the underlying ufshcd driver make a data packet and put in in system memory. The system memory is allocated using dmam_alloc_coherent. The driver also write the starting address of this memory in UFS host controller register. You can see this driver in linux-3.17.2/drivers/scsi/ufs Now when in TLM model I read that register, I get the correct address bus when I try to access this address as uint8_t data1 = *( uint8_t *) (address); I am getting segmentation fault. My question is can I directly access system memory address in TLM model as I am doing above or I need to do something special. Thanks
  5. hello , I have a virtual platform(versatilepb based) which I am using to validate my Universal flash subsystem(UFS) host controller TLM model. From OS, when it issue SCSI command, the underlying ufshcd driver make a data packet and put in in system memory. The system memory is allocated using dmam_alloc_coherent. The driver also write the starting address of this memory in UFS host controller register. You can see this driver in linux-3.17.2/drivers/scsi/ufs Now when in TLM model I read that register, I get the correct address bus when I try to access this address as uint8_t data1 = *( uint8_t *) (address); I am getting segmentation fault. My question is can I directly access system memory address in TLM model as I am doing above or I need to do something special. Thanks
  6. hello , thanks for then reply ... could you tell OS related commands to drive SCSI commands ...
  7. Hello guys , i am into development of UFS(Universal Flash Storage) which follows SCSI based commands ....Now i have developed its model and wish to verify this model with device driver available in linux kernal now as i have already mentioned this is SCSI based(protocol similar to USB) ... Now how do i drive this SCSI based driver from the terminal ..should i call the SCSI commands or device driver ... the problem is a general device driver verification problem but i could't find it solution on net ... i know this problem is not related to this forum but can someone guide me who have done it earlier ...
  8. well Karthik welcome to the group -- you can find a lot books on these topics which are easy to understand with prior knowledge of modelling language (ill PM you if u cannot find) regarding projects you can start with peripheral IPs like USART ,SPI ,I2C ,etc
  9. pseudo code as- Module 1 -> module 2 (TM connection) in module 1 { thread1();{ taking data X from qeueu 1 } thread 2();{ taking data Y from qeueu 2 } } module 2 { btransport (){ if queue 1 is empty then wait else read data from queue 1 } } note 1 - queue 1 is filled from thread in module 2 contains data for both thread1 and thread 2 now the issue is at some stage both thread 1 and thread 2 are waiting for data to be written on queue1 ... now as soon as data is written on queue 1 i want to control which thread to trigger from module 1 as order of data is not fixed .. any solution suggested here ...
  10. Hello , i have a scenario where there is tlm scokets btw two module Module 1 have two threads A & B running independently and module 2 has single thread C now i problem is thread1 is activated first(assume) and after some transaction waits in b_transport , by wait here i mean some qeue is there which is updated by thread C .now thread B becomes active and call b_transport which brings the thread A out of wait (it doesnt suppose to happen as it qeue is not updated) and produce unwanted result ... how to control this ...right now i am using a while loop in wait qeue for thread A so that it keep on waiting (it is working) but not sure whether it is the right appoarch .... hope u understand ...pls help
  11. Hello guyz , i am getting this error on a particular notification below is the stack Program received signal SIGBUS, Bus error. 0x00007ffff7d0317e in sc_core::sc_event::notify(sc_core::sc_time const&) () from /usr/local/systemc-2.3.1/lib-linux64/libsystemc-2.3.1.so (gdb) backtrace #0 0x00007ffff7d0317e in sc_core::sc_event::notify(sc_core::sc_time const&) () from /usr/local/systemc-2.3.1/lib-linux64/libsystemc-2.3.1.so #1 0x00000000004225c2 in logical_unit<unsigned int, 32u>::response (this=0x6f5220, task_comand=33 '!', rsponse=0 '\000', lun1=2 '\002', t_tag=17 '\021') at /home/mic-24/Desktop/qemu+other/ufs_dropbox_21/include/logical_unit.tpp:1314 #2 0x0000000000429d44 in logical_unit<unsigned int, 32u>::lu1_data_in (this=0x6f5220, current_cmd=..., opcode_current_cmd=8 '\b', lu_resent_data=0 '\000', lun_ftl=1 '\001') at /home/mic-24/Desktop/qemu+other/ufs_dropbox_21/include/logical_unit.tpp:458 #3 0x0000000000424028 in logical_unit<unsigned int, 32u>::command_processing (this=0x6f5220, lu_resent_data=0 '\000', lun_ftl=1 '\001') at /home/mic-24/Desktop/qemu+other/ufs_dropbox_21/include/logical_unit.tpp:199 #4 0x000000000041bd22 in logical_unit<unsigned int, 32u>::logical_unit_thread (this=0x6f5220) at /home/mic-24/Desktop/qemu+other/ufs_dropbox_21/include/logical_unit.tpp:37 #5 0x0000000000416979 in device<unsigned int, 32u>::logical_unit_trans (this=0x6dce00) at /home/mic-24/Desktop/qemu+other/ufs_dropbox_21/include/device.tpp:315 #6 0x00007ffff7d1dde6 in sc_core::sc_thread_cor_fn(void*) () from /usr/local/systemc-2.3.1/lib-linux64/libsystemc-2.3.1.so #7 0x00007ffff7d0248b in sc_core::sc_cor_pthread::invoke_module_method(void*) () from /usr/local/systemc-2.3.1/lib-linux64/libsystemc-2.3.1.so #8 0x0000003362a079d1 in start_thread () from /lib64/libpthread.so.0 #9 0x00000033626e886d in clone () from /lib64/libc.so.6 (gdb)
  12. Hello guyz i have some issue related to this #include "systemc.h" class test : public sc_module { public : sc_event_queue events; SC_HAS_PROCESS(test); test(sc_module_name name){ SC_THREAD(thread1); SC_THREAD(thread2); } void thread1(){ //wait(event_1); events.notify(SC_ZERO_TIME); events.notify(SC_ZERO_TIME); } void thread2(){ while(1){ wait(events.default_event()); cout<<"event arrived"<<endl; } } }; Now this is printing " event arrived " twice ... Now but in actual there is also a wait (commented part) in code ... now when i am actualling implementing it , it is running only once ...i dont understand the reason for this ......
  13. Hello ,i have a scenario like this thread1 {while(1) e1.notify(); } thread2{ while(1){ wait(e1); } } know thread 1 leaves control after two loop i.e after two event notify now i want thread2 to also run twice ... can use sc_event_and_list here ???will this fullfill my purpose ...
  14. thanks guys ...
  15. hello , I have a problem here where i am using wait(e1||e2) now when it comes out of this wait statement i have to perform some functionality when e1 is triggerred and some functionality when e2 triggered ... thnaks ...