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swapnilm

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  1. Dear All, I need to send some high impedance/IDLE symbols (eg 101010...) between the two packets/frames for long time. So is it possible in UVM to send some random data (not through packets in the form of bytes)? If yes, how do I do it? Can this be done through some constraint variables, set in a config db object? Its urgent, so any guidance, regarding the process, will be appreciated. Thanks
  2. Can some uvm expert please throw some light on this topic? Thanks
  3. Hello all, Can there be more than one different kinds of sequences, containing different kinds of pkts, be nested in one single sequence? so that the test case scenerio, will be to show different kinds of pkts,going one after another in a single sequence to the driver? Please guide,thanks
  4. Dear all, I need to create different kinds of packets, for eg nested packets(one or more pkts encapsulated in another pkt), simple packets etc, of the same protocol. Can these different kinds of pkts be made/created (as an object) from the same transaction class? If yes, how shall I manage the packing/unpakcing(do_pack/do_unpack functions) of their bytes, as the bytes travel scenerios, will vary from pkt to pkt? OR if I am creating different classes for each different kind of pkt structure, then will they be controlled properly from sequences, in order to create testcase scenerios? Any guidance will be helpfull. Thanks
  5. Hello mea1201, Actually I need to send different kind of data pkts. In here, there will be a traffic to send only NACK(for missed pkts) bytes (received from monitor) to be sent to the driver. This is high priority data. So I want to know that, there is a single driver, and it can receive one pkt at a time through get_next_item. I am not able to know how the driver would know/respond to these priorities? I mean the driver should respond to these NACK bytes first and not to the normal traffic pkts. It may be possible by setting the priority of sequences from sequencer. Is that correct? Please guide me through. Thanks
  6. swapnilm

    Nesting of frames in UVM?

    Hi mea1201, I actually want to insert one(or more) packets into another packet.This encapsualtion of pkts will start from the second byte of the header. I didnt really get what you said. Could you please elaborate a little more. Thanks
  7. Dear All, Is it always the case that the TOP test class can control/manage the control knobs of sequences only? I mean, I want to override/control some parameters of driver class from top test class, can this be done? If yes, how can that be done? because top test class stimulates only a sequence, so how would the control knob of driver be controlled from top test class? any guidance will be helpfull. Thanks
  8. Hello All, I need to send some bytes/packets(which are received from the DUT, for eg. NACK for missed packets) to the driver. So can I directly connect the monitor to the driver, without going through the sequencer? In other words, I want to connect one TLM between monitor and driver, can this be done? Please guide, Thanks
  9. Hello all, Can I have 3 TLMs connected between a single sequencer and a single driver in UVM? In other words, I want 3 pipes/TLM connections to send three different kind of packets to the same driver from the same sequencer. Or in other words, can a sequencer has 3 exports? Can a diver has 3 ports, so that they can be connected with each other? Please guide, thanks
  10. swapnilm

    Nesting of frames in UVM?

    Can someone please give me some idea about it? What could be the UVM methods to create nested frames? Would appreciate it. Thanks,
  11. Dear All, I am getting one strange error while using questasim 10.2a. While simulating 1st time, it simulates properly, all the packages, libraries get loaded fine. But when I tried to simulate the design 2nd time, the Questasim gets stuck forever while loading the libraries and packages, and further doesnt simulate it. So I have to restart the tool. This process is happening again and again, And it gets stuck again at the 2nd time while simulating. What might be the error/problem happenning here? I am using the license server for this. Please help me to debug this error. Thanks,
  12. Hello all, I want to create nested frames/packets. My packet structure is shown below. I want to have nested frames(one or more frames within another frame) starting from 2nd byte of header and before the EOF/EOT. Please give me some guidance of how to include nested frames into another frames in UVM? What are the methods/macros in UVM which will be usefull in this regard. [/code] rand bit [7:0] sync; rand bit [7:0] sof; rand bit [15:0] header; rand bit [7:0] payload[]; rand bit [15:0] crc; rand bit [7:0] eof; //Or EOT(end of transmission) [/code] Any help/suggestion is appreciated. Thanks,
  13. Can someone please give reply to this, I would appreciate it. Thanks
  14. Dear All, I am getting one strange error while using questasim 10.2a. While simulating 1st time, it simulates properly, all the packages, libraries get loaded fine. But when I tried to simulate the design 2nd time, the Questasim gets stuck forever while loading the libraries and packages, and further doesnt simulate it. So I have to restart the tool. This process is happening again and again, And it gets stuck again at the 2nd time while simulating. What might be the error/problem happenning here? I am using the license server for this. Please help me to debug this error. Thanks,
  15. Hello all, How do I set priorities for some features, to be added in a transaction class? Is there any method in UVM for that? For eg. when I get a NACK, I need to respond to it quickly and resend the same frame or (a nested frame), in priority. Can some one please give me some guggestions for this? How do I include this feature in a transaction/packet class? Thanks,
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