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David Black

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Everything posted by David Black

  1. David Black

    system c beginner

    Here is a short list of topics in no particular order you need to be comfortable with in order to be have an easier time learning SystemC: [Note: Others might chime in with variations on this list (add/subtract), and this is not necessarily a complete list, but I am fairly certain if you are able to comfortably use the topics I list below, you will have very little trouble syntactically with learning SystemC. In addition to C++, it helps if you have some familiarity with event driven simulation (e.g. SystemVerilog or VHDL). Also, if you have deep knowledge in another OO language (e.g. Java or SystemVerilog), you might have an easier time learning the C++ part.] Difference between declaration and definition Pass by value vs pass by reference Use of const (5 distinct cases) Casting C++ style (4 types) Implicit vs explicit conversions Use of function overloading and how to deal with ambiguity issues Use of std::string Use of streaming I/O How to declare, define and use classes Definition of default constructor Purpose and syntax of copy constructor How to declare and use namespaces Operator overloading as member functions and global functions. The difference between overloading and overriding. Relationship between class and struct How to extend classes and multiple inheritance Purpose of public and private Storage types and lifetimes: static, automatic, dynamic How to properly use new and delete Use of pointers and understanding of issues with pointer arithmetic Use of arrays and issues Advantages and use of std::vector<> Use of try-catch and throw Use of initializer list in constructor and a proper understanding of the order of construction Polymorphism and RTTI RAII Rule of 4 (6 if using C++11 or later) How and where to define templates/generic programming (does not need to be deep knowledge - just the basics) Use of templates and nested templates. Definition of full and partial template specialization. Different types of constructors and destructors Use of virtual inheritance (hint: it's not polymorphism) Extra topics: More STL including at least std::map<>, std::set<> Boost Modern C++ users (2011 onward) should know about: nullptr Uniform initialization Use of auto Use of ranged for Lambda definition, binding and use constexpr std::unique_ptr<>m std::shared_ptr<>
  2. David Black

    System C quite different from c++

    First, the title of this post is completely nonsensical. SystemC is a library written in C++ and everything about it is C++. It is much more likely that you simply are not very proficient with C++. One aspect of SystemC I always warn newbies about is that SystemC uses pretty much all of the features of C++. You really cannot get by with just thinking C++ is merely a better C. You have to really know about polymorphism, function/operator overloading, templates, exception handling, STL libraries, and all things C++. If you do not, I suggest you get some deeper learning on C++. Your problem is that sc_module disallows copy construction. Prior to C++11, this was accomplished by declaring the copy constructor private, which is why you are getting the error. sc_vector really is a better way of creating an array of modules, and it looks as if somebody has given you this hint.
  3. David Black

    what is "argc" and "argv[]" in systemc?

    Doesn't make as much sense to those who use Windows and Visual Studio. Much more understandable if you use Linux. Tip: You can access those two arguments from anywhere in your SystemC design using the two functions: sc_argc() and sc_argv(), which are in the sc_core namespace. Keep in mind that they only provide access to c_str values. If you want to interpret a numeric value from the command-line, you will need to convert it yourself.
  4. David Black

    When exactly an event is servicd

    SystemC behaves in almost identical manner to other event driven simulators (e.g. Verilog and VHDL). The simulator provides a co-operative multitasking model to simplify the programming paradigm. SC_THREAD processes yield by calling wait() and SC_METHOD processes yield by returning. There are 3 semantics for event notification: notify() immediate notify(SC_ZERO_TIME) at the end of the current delta cycle notify(NON_ZERO) scheduled to occur at a scheduled time in the future Furthermore, you need to be aware that SystemC is not inherently thread safe.
  5. David Black

    Generic Payload Extensions

    Adding ignorable extensions and using the generic payload means that your TLM models would be reusable and interoperable with other TLM components that conform to the standard payload. By deriving a new class, you would make your model less usable in alternate systems.
  6. David Black

    serial transmission

    [I assume that when you say "TLM", you mean SystemC TLM 2.0.] You need to understand the difference between modeling styles. TLM is precisely about not modeling at the level of RTL. The SystemC TLM 2.0 also has two different modeling styles: Loosely Timed (LT) and Approximately Timed (AT). Let's look at each using a specific case. Suppose you are modeling two UARTs operating at 9600 baud (bits per second) with 8-bits, no parity, and 1 stop bit to transfer the message "Hello World\n". This configuration results in 960 characters per second (1.042 ms/char), which is quite slow, so probably you would be transmitting/receiving characters slowly enough that most systems would either process them one at a time or provide a FIFO (e.g. 16 bytes) and only process empty/full events. There is one more question to answer though. Consider the diagram below. The connections between sender to UART and UART to receiver are clearly memory mapped for most systems. So there is no question of modeling. The connection UART to UART is not memory mapped, which means you need to create a custom protocol. Furthermore, for TLM, it actually requires to connections since communication can be invoked bi-directionally (for a full UART). You need to decide what is important to model. For a high level model and efficiency, I would either transfer as much data as I could. It might even make sense to use TLM 1.0 rather than TLM 2.0. Do you have the requirement to inject errors? For my example, you would configure the transmitter, and then transfer a burst of 12 characters into the transmit FIFO on one end of the transfer and generate an empty FIFO interrupt at 12.5 ms later. The receiver side would be similar. What about the UART/UART transaction? An efficient approach might be as follows: Create a required extension that carries the transmit configuration information (baud rate, bits, parity, etc.) Use TLM_WRITE_COMMAND because all transactions over this socket pair are initiated from the sender. The second pair in the opposite direction would do the same thing. Check and insist that the address always be 0 and the streaming width is 1. Byte enables would be illegal. Check that the configuration matches before accepting data. Place all received data into an unbounded queue and then indicate the size allowed by the hardware model. Send interrupts using the sc_signal when the received queue goes non-empty. Consider the error situation when the timing indicates characters would be lost due to FIFO full and timing of characters. You will have to decide how to deal with interrupts received in your thread process. Notice that I do not model at the bit level. If you wish to add bit-level error injection, then inject errors at the point of transmission.
  7. Where is this code executing (constructor, SC_THREAD, start_of_simulation)?
  8. David Black

    async_request_update() multiple events

    Remember that the SystemC OS thread is completely asynchronous to external threads and processes. Async_request_update() simply says to call update() once at the end of the delta cycle for a single object. So you can get multiple notifications within the same delta and only get one call-back. To keep from losing these you should setup a threadsafe mailbox/queue. Rather than just notify the event, you should also put an entry into the mailbox on each activation. Then your threadsafe update() method can see the multiple requests accurately.
  9. David Black

    Changing the width in sc_bv<W>

    These questions have little to do with SystemC per se, and are really about C++. Templates are all about compile-time elaboration and template arguments must be compile-time computable. If you use C++11 or later, then various forms of constexpr functions may be available, but they are still compile-time issues. You could of course use sc_bv_base and its constructors, but keep in mind that modules, ports, and other "hardware" constructs are not allowed to be modified after end_of_elaboration. KEY POINT: To be an effective SystemC designer, you MUST be proficient at C++. Minimal C++ is NOT enough. Knowledge of C (even expert knowledge) is totally inadequate and in some cases downright harmful. Furthermore, really good SystemC often requires excellent C++ skills. Therefore, before you even consider learning much in SystemC, you really should invest in a solid C++ course. Expert SystemC practitioners take time to continually update their C++ skills. If this does not sound like fun to you, then I would advise choosing a different discipline.
  10. David Black

    SystemC _ what is mean symbol "\" ??

    To be slightly more precise, the back-slash character (\) has two contexts. In this context, it is an escape character for CPP, the C Pre-Processor. It should only be used when using the pre-processor #define directive. Without \, the #define must be kept entirely on a single line. The other context for which \ is used, is inside literal strings and and character constants. Examples: "Hello world\r\n" and "\n". In these cases, it serves to provide an escape to introduce non-printable ASCII characters.
  11. David Black

    define sc_main in VS 2017

    Don't change the default entry point and don't define main. Main is already pre-compiled inside the library!
  12. David Black

    Passing collected events to sensitive

    You are specifically referring to static sensitivity. Perhaps you should consider using dynamic sensitivity instead. You can use sc_event_and_list and sc_event_or_list to build up appropriate sensitivities.
  13. This happens because sc_port overloads operator[]. You need to use sc_vector tlm::tlm_initiator_socket<32,tlm::tlm_base_protocol_types,0,SC_ZERO_OR_MORE_BOUND> Out; SC_MODULE(Target) { sc_core::sc_vector< tlm::tlm_target_socket<32,tlm::tlm_base_protocol_types,1,SC_ZERO_OR_MORE_BOUND> > In; SC_CTOR(Target) : In("In", 2) { ... } //< Number of elemements selected via sc_vector constructor } initiator_inst->Out.bind(target_inst->In); Note: Above is pseudo-code (i.e. not in all the right places), and I have not taken time to verify the detail, but the principle of using sc_vector is correct. You may need to consult the literature.
  14. David Black

    Debugging Multi threaded program in SystemC

    The problem with using SC_METHOD is that it forces a style of coding that is harder to design/debug and slows down the design process. Schedule-wise SystemC is supposed to be written quickly. If you take too much time writing/debugging it, then it can become a counterproductive effort and you might as well write RTL alone. I usually characterize it as follows: Loosely-Timed models should be written in a matter of days (not weeks or months). Approximately-Timed models should be written in terms of a few weeks (not months). Anything longer means that either you are adding too much detail (which also slows down model execution) or you are not properly reusing other people's work (purchasing/acquiring pre-written models). So yes, I would use SC_METHOD when it's use is obvious/intuitive, but I would rather express ideas in the most natural manner to speed up development time, which often means using SC_THREAD.
  15. David Black

    Backtrace with sc_report_error()

    Using your own report handler is a bit extreme; although, instructive. I suggest using the sc_report_handler::set_action() method. Please read the standards document (downloadable from IEEE via link on Accellera). It's quite readable.
  16. David Black

    Debugging Multi threaded program in SystemC

    Ankur, I'm not sure where you got the advice that SC_THREADs are bad or cause context switching, because that is mostly just an old wives-tale. I did a study years ago that showed the difference between SC_METHODs and SC_THREADs is only 3%. Furthermore, it is a simulator implementation issue as the PoC implementation is only one of several. I know at least one implementation of the SystemC kernel actually had the advantage reversed (and it was faster than the PoC implementation). The real problem is context switching, which cannot be totally avoided in any case. Context switches occur everytime your SC_METHODs return or your SC_THREADs call sc_core::wait() even if indirectly (e.g. sc_fifo::read()). If you are having performance issues, you need to be profiling your code to identify the real problems. You can get rid of a lot of context switching if you simply elminate sc_clock's entirely from your design. Most engineers (esp. hardware focused) have a difficult time with this concept, but sc_clock causes two context switches per cycle and in many designs is entirely not needed. I did a presentation "Look Ma! No clocks!" (available somewhere under www.nascug.org) and demonstrated how a timer could be modeled accurately without clocks. A couple of other areas often missed are I/O and compiler switches. I/O is much bigger than context switching in terms of slowing down simulations, and yet still I often see engineers putting SC_REPORT_INFO (or worse: std::cout and printf) in their code to dump all the activity to aid debug. Except for phases before SC_SIMULATION, you should really use SC_REPORT_INFO_VERB with SC_DEBUG or equivalent. As to compile-time switches, -O3 is really quite decent once you have most bugs out, and you can leave debug -g on without worry.
  17. David Black

    SC_METHOD and next_trigger() diagnostics

    Re. the error SC_METHOD is called repeatedly (every time an element of the static sensitivity list triggers); however, SC_METHOD processes must execute in single delta cycle (zero time). Blocking methods such as wait() is illegal there. Methods such as sc_fifo::write() call wait() and are therefore also illegal. To wait 10 ns, you can do something like this: #include <systemc> #include <iostream> struct Ex1 : sc_core::sc_module { Ex1( void ) { SC_HAS_PROCESS(Ex1); SC_METHOD(Method10ns); } void Method10ns( void ) { next_trigger( 10, SC_NS ); std::cout << "Now " << sc_core::sc_time_stamp() << sdt::endl; } }; SC_THREAD is called only one, and therefore normally contains an infinite loop to properly model hardware. Thus the above is coded more simply as: #include <systemc> #include <iostream> struct Ex1 : sc_core::sc_module { Ex1( void ) { SC_HAS_PROCESS(Ex1); SC_THREAD(Thread10ns); } void Thread10ns( void ) { for(;;) { std::cout << "Now " << sc_core::sc_time_stamp() << sdt::endl; wait( 10, SC_NS ); } } };
  18. David Black

    SC_METHOD and next_trigger() diagnostics

    Re. SC_HAS_PROCESS That would appear to be an error in the text. The best place to put SC_HAS_PROCESS is inside the constructor as the first line in the body of the constructor. It is syntactically legal there and the only things using it are the SC_METHOD, SC_THREAD, and SC_CTHREAD macros.
  19. David Black

    Backtrace with sc_report_error()

    I suspect your problem is not understanding that the default action for SC_ERROR is to throw an exception. So you have two choices: 1. Surround calls with a try/catch block. 2. Change the default action to SC_DISPLAY without SC_THROW. I would also suggest you use the SC_REPORT_ERROR() macro so that you get the file and line number where the call originated.
  20. David Black

    How to initialize sc_fifo

    Your problem is C++ rather than SystemC. "Initialization" should be titled "construction". You either need to use the initializer list to invoke the constructor, or if you are using C++11, you can use uniform initializer syntax.
  21. David Black

    Does system C support matrix of unknown size

    This has nothing to do with SystemC, but more to do with your declaration. You are declaring an array of pointers to integers on the stack. Stack in SystemC is 64k by default, which means you are limited to 64k/sizeof(int*). I suspect you intended to declare a pointer to an array of ints: int (*matrix)[]; // Pointer to array of int or int** matrix; I suggest you read at least one of the following: https://www.codeproject.com/Articles/7042/How-to-interpret-complex-C-C-declarations https://www.geeksforgeeks.org/complicated-declarations-in-c/ https://medium.com/@bartobri/untangling-complex-c-declarations-9b6a0cf88c96 For simplicity, I like the following tool: https://cdecl.org
  22. David Black

    Getting a bit from bus

    First thing you need to realize is that sc_signal<> is not a wire and it is not a data type. sc_signal<> is a channel with a non-blocking write and a blocking read. You cannot "connect" a variable to a signal. You have to explicitly make the transfer each time the value changes. There is no equivalent to a Verilog continuous assignment. How do you know if a signal has changed? You have to explicitly watch/wait for the change using additional methods value_changed_event() or possibly posedge_event() if using sc_signal<bool> or sc_signal<sc_logic>. Due to overloading of operator=(), the innocuous looking busCON10 = var_bus_CON[10] turns into: busCON10.write(var_bus_CON[10].read()); which will not return a value until the end of the next delta cycle. Using a cout << busCON directly after this will yield the current delta's value.
  23. David Black

    sc_thread vs pthread

    SystemC follows event driven simulation semantics to simplify hardware modeling. In part, this means using a cooperative multi-tasking model rather than a modern pre-emptive model. In this respect, SystemC is like SystemVerilog and VHDL. This makes it easier to focus on the modeling aspects rather than worrying about mutexes, volatility and other interactions due to multicore and parallel processes. Advanced SystemC users can use OS threads for some tasks, but the synchronization aspects are up to the programmer. So SC_THREAD's are not pre-emptive (nor are SC_METHOD processes) and hence a straightforward SystemC model is single core single threaded from an OS/software point of view. Additionally, you should be aware that the SystemC scheduler is not thread-safe for the most part. If you make use of async_request_update(), you can use multicore and parallel processes to interact with SystemC events. This assumes you are an expert programmer and proficient with C++ (not for beginners). There have been and are some efforts underway to standardize parallelization in SystemC, but it is a volunteer effort and you need to be on the SystemC LWG group to participate. Some commercial entities have developments underway, but keeping those closed for the time being. Always keep in mind that SystemC is not freeware, but was created as part of a commercial coalition to standardize modeling across/between companies. Don't think of SystemC as a free simulator. Also, SystemC is often mistaken as a competitor/alternative to SystemVerilog/VHDL, which it is NOT. SystemC was intended for high-level modeling and abstractions above RTL. The ability to co-simulate with RTL is a requirement for some of the use-cases. SystemC is used quietly by many large corporations to augment specification and verification. It differs from the other languages in that it uses an off-the-shelf C++ compiler and has no requirement of a specialized compiler. This benefits companies with huge software development teams using SystemC Virtual Platform models for early software development. The downside of this approach is the C++ compiler has no understanding of the SystemC domain and has no way to make optimizations that SystemVerilog/VHDL do (e.g. clocks). That is one reason that SystemC coders are advised to avoid explicit clock models to gain performance. Keep the design at as high a level of abstraction as you can.
  24. David Black

    using sc_vector to Pass an Array between Modules

    sc_vector was designed for use during elaboration. sc_vector semantics are based on std::vector. For that matter, why are you not using std::vector? Are you passing an elaboration call. Furthermore, you would simply pass variables by reference in C++ anyhow. For a 2-dimensional array you would simply use a vector of vectors. Your basic problem sounds like a severe lack of C++ basics.
  25. David Black

    Executing Modules More than Once

    Q1: How are you declaring the processes? [Note: Seeing actual code would help a lot. Your descriptions are completely inadequate for anybody to understand exactly what you are asking.] Q2: What book are you using to get trained on using SystemC?