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  1. I want to model a memory of depth 2048 and width 64 bits. Currently I doing as below and when i am running the walk_mem sequence, its going from 0 to 2048 rather than 2047. super.new(name, 'h101, 64, "RW", UVM_NO_COVERAGE) Thanks in advance
  2. Hi, I want to use the "uvm_debug" verbosity but i couldn't find it in uvm1.1/1.2 class reference user guide. Thanks
  3. Hi, I there a limitation to the number of registers that can be handled by uvm register model? if yes, whats the count. QW
  4. Hi, While doing force using "uvm_hdl_force", i am getting the below error and the specified memory location is not written with that value. But it works using "force". Any solution to this. ERROR: VPI NOFORCO vpi_put_value() cannot force object of type: vpiReg. Thanks QW
  5. Hi Uwe, Any specific reason why not to use the uvm_hdl_force directly? -QW
  6. used $sformatf to pass it to a string a pass that string to uvm_hdl_force(). thanks for the solution.
  7. Hi, I my using uvm_hdl_force("path",data) to configure the registers of the design. But the problem is they are large in number so i want to loop them in. for(int i=0; i<8; i++) begin for(int j=0; j<8; j++) begin uvm_hdl_force("DUt.abc.pkt.reg_0.w[1]" , data); end end I want to replace 0 with i and 1 with j . Is their a simple way to do it.
  8. Thanks tudor, that is a nice way to get the access policy of registers if all the fields have same access policy.
  9. Hi, How can i get the access policy of a register? For fields its possible to get using get_access(). Is their a way to extract the "Registers" from the model with RW access policy ? Thanks.
  10. Thanks guys for the help..
  11. I have modeled the unused bits as "rsvd" in the model. but the issue is, the dut still writes on those unused bits. So while i do a mirror, it fails as the dut has all 1's (if i write all 1's ) but the model writes according to the mask in it. So how can i disable the check or what access policy to use to disable it. Thanks
  12. Hi, I have a 32 bit register in which some of the bits are reserved. I have added the mask in the register model. But the reserved bits are also read/writable. I only wont to write to the bits which are not reserved. foreach (rg) begin foreach (fields[j]) begin if (fields[j].get_name() == "UNUSED" ) begin $display("UNUSED field= %s",fields[j].get_name()); end else begin fields[j].write(status, wdata,.parent(this)); end end I tried the obove solution, but it writes for every field which is slowing me down. Is their a way i can get the mask from the register model? Or any other solution? Thanks
  13. Hi, I have a sequence running but i want to delay that sequence for 50 clk. How can i do it from the test. Is reset_phase a good option in the test class? or is their another way out. thanks
  14. Hi, I want to randomize a variable defined in a function. The function is inside a package. I tried declaring a class inside the package and taking the instance of that class in the function. But that didnt work out as the object needs to be static. I tried randomization() function, but the problem is the variable "k" can only have 2 value ie (5,9). function foo() int k; void'(randomize(k)) with {k==5;k==9;}); // I am getting randomization failure in this case. endfunction Let me know how can this be resolved. Thanks.
  15. Yes, I have a virtual sequencer which instantiate all the 3 sequencers. Now the problem is that one of the signal (req.en) in a sequencer controles the operation of the other two as explained. If en=1 then one of the sequencer drives the data to the DUV and if en=0 the other works.