Could you please clarify on how one can disable the clock? I have a Verilated RTL wrapped in a TLM AT. Please correct me if I am wrong, but I can't just put a clock gating in front of my RTL, because the events will still be generated. And I can't find a relevant method in sc_clock class to just disable the clock. Maybe I need to use dynamic sensitivity, but it is not desirable for me, due to the Verilated part (or I just don't know how it should be done).
Ideally I would like to Suspend clock generation based on the PEQ in my target.
Thanks in advance!