Looking for some general directions or documents (if available), on the following problem -
1. I have with me a cycle-accurate SystemC RTL. This represents one part of my SoC
2. I want to wrap this in a TLM 2.0 Loosely-Timed wrapper so that I can interface it with software
Thus I need some guidance, as to how I can implement that same, or if someone has done it before.
What have I tried, what do I know.
1. I am currently aware of the TLM 2.0 blocking and non-blocking interfaces. I understand that the blocking interface is implemented to create a LT model
2. In my understanding, the top level wrapper implementing a simple_target_socket could wrap my RTL C++ model. The blocking transport function should then take care of receiving the data, converting it to the input ports of the internal model, and then sending the response
3. One question I run into while following this model is of how to manage time. The RTL model will take a certain amount of time to execute and return the time taken. Should I make the initiator thread wait for that long? Or should I just update a side value? If I have multiple initiator targets, how will this be synchronised?
Thanks for reading! Looking forward, if someone can help out!