Jump to content

Genov

Members
  • Content Count

    6
  • Joined

  • Last visited

  1. Thanks, but in this example they use a convenience sockets and I can`t use that.... In my project I need to have an Interconnect that contains a Child module ( so I have an hierarchical binding that is not supported by the (tagged) sockets ). So I need an Interconnect that support hierarchical binding. The tlm_*_sockets don`t have a registers, so I`m not really sure how to implement them.....
  2. Can someone give a simple exemple of an Interconnect using tlm_initiator_sockets and tlm_target_sockets, please? ( with a dummy implementation of the two transport methods blocking and non-blocking)
  3. Can anyone help me with that problem ? And can someone post or send me a simple example of an Interconnect component using multiple tlm_initiator_sockets to send a transaction by nb_transport method,because all the examples uses convenience sockets and I can`t really see how to do it with the basic ones... In the LRM there is only a Guideline...... Thanks
  4. Hello Philipp I`am asking because I have an error when I try to do that. Here is a part of my code ( trying to have the structure : Initiator, Parent ( Child ) , 2 Targets) : ==================================================================================================================== struct STC_init: sc_module, tlm::tlm_bw_transport_if<> { tlm::tlm_initiator_socket<32> initiator_socket; public: enum previous_phase_enum {Rcved_UPDATED_enum // Received TLM_UPDATED d ,Rcved_ACCEPTED_enum // Received ACCEPTED ,Rcved_END_REQ_enum // Received TLM_BEGIN_RESP }; typedef std::map<tlm::tlm_generic_payload *, previous_phase_enum> waiting_bw_path_map; waiting_bw_path_map m_waiting_bw_path_map; // Wait backward path map sc_core::sc_event m_enable_next_request_event; tlm_utils::peq_with_get<tlm::tlm_generic_payload> m_send_end_rsp_PEQ; // send end response PEQ const sc_core::sc_time m_end_rsp_delay; // end response delay bool m_enable_target_tracking; // ? remove int data[16]; mm m_mm; //Constructor SC_HAS_PROCESS(STC_init); STC_init( sc_module_name name, sc_dt::uint64 base_address_1, sc_core::sc_time end_rsp_delay) // sc_module_name name, : initiator_socket ("initiator_socket") /// init socket name , m_send_end_rsp_PEQ ("send_end_rsp_PEQ") /// init PEQ name , m_end_rsp_delay (end_rsp_delay) /// init end response delay , m_enable_target_tracking (true) { initiator_socket.bind(*this); SC_THREAD(thread); } void thread() { ......................... } struct STC_inter: sc_module, tlm::tlm_fw_transport_if<>, tlm::tlm_bw_transport_if<> { //attributs tlm::tlm_target_socket<32> m_target_socket; // Target socket going to DRC0 tlm::tlm_initiator_socket<32> m_initiator_socketDRC0; // going to DRC0 tlm::tlm_initiator_socket<32> m_initiator_socketDRC1; // going to DRC1 //constructor SC_CTOR(STC_inter): m_target_socket("STCtarget_socket"), m_initiator_socketDRC0("STCinit_socketdrc0"), m_initiator_socketDRC1("STCinit_socketdrc1") { m_target_socket.bind(*this); // Bind the target socket to STC m_initiator_socketDRC0.bind(*this); // Bind the initiator socket to STC m_initiator_socketDRC1.bind(*this); // Bind the initiator socket to STC SC_THREAD(thread); // Initiator THREAD } //Initiator thread definition void thread() { ....................................... } // Hierarchical binding struct Parent_of_STC: sc_module { //attributs tlm::tlm_target_socket<32> m_target_socket; // Target socket tlm::tlm_initiator_socket<32> m_initiator_socketDRC0; // going to DRC0 tlm::tlm_initiator_socket<32> m_initiator_socketDRC1; // going to DRC1 STC_inter* stc_inter_targ; STC_inter* stc_inter_initDRC0; STC_inter* stc_inter_initDRC1; //Constructor SC_CTOR(Parent_of_STC): m_target_socket("PapaTarget_socket"), m_initiator_socketDRC0("PapaInitiator_socketdrc0"), m_initiator_socketDRC1("PapaInitiator_socketdrc1") { stc_inter_targ = new STC_inter("STCtarget"); stc_inter_initDRC0 = new STC_inter("STCinitiator0"); stc_inter_initDRC1 = new STC_inter("STCinitiator1"); m_target_socket.bind(stc_inter_targ->m_target_socket); // Bind target socket to parent target socket !! Different from initiator binding!! stc_inter_initDRC0->m_initiator_socketDRC0.bind(m_initiator_socketDRC0); // Bind initiator socket to parent initiator socket stc_inter_initDRC1->m_initiator_socketDRC1.bind(m_initiator_socketDRC1); // Bind initiator socket to parent initiator socket } }; struct STC_targ: sc_module, tlm::tlm_fw_transport_if<> { //attributs tlm::tlm_target_socket<32> target_socket; //constructor SC_CTOR(STC_targ): target_socket("socket"){ target_socket.bind(*this); } virtual tlm::tlm_sync_enum nb_transport_fw( tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, sc_time& delay ) { ............................... } SC_MODULE(TOP1){ STC_init* stc_initiator1; STC_init* stc_initiator2; Parent_of_STC* stc_inter1; STC_targ* stc_target1; STC_targ* stc_target2; SC_CTOR(TOP1){ stc_initiator1 = new STC_init("init1", 0x0000000000000100, sc_core::sc_time(10, sc_core::SC_NS)); stc_inter1 = new Parent_of_STC("inter1"); stc_target1 = new STC_targ("targ1"); stc_target2 = new STC_targ("targ2"); stc_initiator1->initiator_socket.bind(stc_inter1->m_target_socket); stc_inter1->m_initiator_socketDRC0.bind(stc_target1->target_socket); stc_inter1->m_initiator_socketDRC1.bind(stc_target2->target_socket); } }; ============================================================================================= The ERROR that I have is : Error: (E109) complete binding failed: port not bound: port `top1.inter1.STCinitiator1.STCinit_socketdrc0` (tlm_initiator_socket) In file: ../../../src/sysc/communication/sc_port.cpp:233 Do you see what can be the probleme ? I am not sure about the way to declare the inititiatorsDRC0 et DRC1, maybe I need a sc_vector..................
  5. Thanks Philipp! That is one of my problems.... is it possible to bind two tlm_initiator_sockets on the same module?
  6. Hello, I`am new to TLM and I`m trying to create a model of an Switch Matrix Hardware component and I have to use the non-blocking transport method. For now I am trying just to create the structure of my Modules. In my model I need to apply a Hierarchical binding and point-to-point communication with multiple sockets on one module. I tried to do that using the basic type of sockets (tlm_initiator/target_socket), the simple_sockets and the simple_sockets_tagged and it`s not working. From the LRM I found out that the simple_socket does not support the Hierarchical binding, so the only possibility that I see, is to use the multi-sockets. But I really need to have the two sockets ( I can`t use just a multi-socket that distribute the transactions in the two targets) and I need to have the hierarchical binding. I am not sure about the approach that I have to chose and I will be thanksfull if someone give me an advice. Thanks
×