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Eyck

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Eyck last won the day on April 4

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About Eyck

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  1. Well, without lnowing the implementation it is hard to tell. I suppose your initiator sockets are connected to target sockets at he bus and the initiator sockets of the bus are connected to the target sockets of your target components. All these sockets need to be bound to each other (by calling bind() or the operator() function). There is no concept of bind-by-name in SystemC. Maybe you should have a look here: https://www.doulos.com/knowhow/systemc/tlm2/tutorial__3/ Sockets need to be bound except they are declared with the appropriate binding policy (the 4th template of the sockets). If this is not the case you need to create dummy targets.
  2. In principle yes, but I would not call it LT or AT as it depends on hte use of a memory manager which can be used in any case. Cheers
  3. Actually this is done in the desrtuctor of the tlm_generic_payload. This part calls for all extensions the free() function. So if out is handled properly destroyed all extensions are destroyed as well. The other option is to call free_all_extensions() explicitly which also calls free() for all extensions as well as for auto extensions (those might be registered when a memory manager for the generic payload is used, usually in AT style modelling using the non-blocking interfaces). HTH
  4. Eyck

    sc_uint and unsigned int

    unsigned int has always the length defined by the underlying platform while sc_uint<> lets you specify the exact bit with of the type. In your case case I would use 'unsigned int' as it is faster and has less overhead. Best regards
  5. Actually your code, its behavior and the spec is in sync. You do not have hierarchical binding as you bind an initiator to a target socket. Therfore you need to register at least one of the callbacks so that the interface get bound to the target socket. Best regards
  6. This means that a port is not bound to an interface. A port is just a kind of a forwarder of an interface. So if none is bound nothing can be forwarded. E.g. if you have a sc_in<bool> it forwards the sc_signal_in_if which allows you to read and wait for events. But there needs to be 'something on the other side' which is usually a signal (implementing the sc_signal_in_if) being bound to the socker. But without further information it is hard to provide more help. Best regards
  7. Well, I don't know how your infrastructure looks like, but in general your setup is ok. What is missing is to set the streaming width which should be one in your case. So a bit more context would be allow to help you better. Context means: how are the sockets connected (is there a direct connection initiator->target or do you use some bus system) how do you read the value out of the payload? Best regards
  8. You need to register callbacks to them so that they are bound to an interface. See Unbound multi_passthrough_initiator_socket/multi_passthrough_target_socket In general I would discourage the use of them (or at least suggest to carefully think about their use) as they have several drawbacks: you cannot bind a target socket to a multi_passthrough_target_socket and you cannot bind in before_end_of_elaboration (see also Is there any order requirement for binding multi_passthrough_initiator_sockets?). BR
  9. Eyck

    Checking ports for power estimations

    Well this a little bit about data representation. old_data is a pointer to a uint8_t and this is what you see in the variables view. It has the value of 0x7ff..fdb10. The memory at this address is 2 which is the lowest byte of the first element in your struct (x of type int). Actually using the struct the compiler orders the 2 elements in a row. Depending on the platform and the compiler the members might be 32 or 64 bit long. Lets assume the int is 32bit and the long is 64 (gcc on 64bit Linux). The layout is as follows (the suffix denote the byte number): old_data -> x.0 x.1 x.2 x.3 y.0 y.1 y.2 y.3 y.4 y.5 y.6 y.7 So the value 2 is the lowest byte of the old_val.x variable having the value of 2 (or 258,...) Well, the struct shown above is not entirely correct. The compiler might choose to put padding bytes inbetweeen the members for performance reasons. In this case above there will be 4 byte of padding between x and y so that y is at an aligned address (a multiple of 8). So you would declare it as struct __attribute__ ((__packed__)) my_data { int x; long y; }; to avoid the paddng. See also https://gcc.gnu.org/onlinedocs/gcc/Common-Type-Attributes.html#Common-Type-Attributes Back to your question: you use the pointer like in an array. the notion *(old_data+i) is equivalent to old_data[i] So in the for loop you iterate over every byte belonging to the struct. BR
  10. This message indicates that you link 2 libraries or object files into one executable which are build against 2 different versions/configurations of the SystemC library. Actually this (or a similar) symbol created during the build of libsystemc and part of the libsystemc. It ensures that the header configuration and the compiled library match. It does not relate to TLM at all. One reason could be an inconsistence wrt the use of C++11, see here: https://stackoverflow.com/questions/46875731/setting-up-a-systemc-project-with-cmake-undefined-reference-to-sc-core Best regards
  11. Eyck

    Checking ports for power estimations

    I'm not sure if I get your first question right. Essentially this is a C++ question. But what you could do is a type erase of your (POD) data, use it as a byte array and count the changed bits using XOR (be carefull to you plain data, no classes). Something like: struct my_data { int x; long y; }; my_data old_val, new_val; uint8_t* old_data = reinterpret_cast<uint8_t*>(&old_val); uint8_t* new_data = reinterpret_cast<uint8_t*>(&new_val); unsigned toggles=0; for(size_t i=0; i<sizeof(my_data); ++i){ uint8_t diff = *(old_data+i)^*(new_data+i); uint8_t mask=1; for(size_t j=0; j<8; ++j, mask<<=1) if(mask&diff) ++toggles; } Regarding your second question: you transport the data via a signal which implements the signal_in_if. This interface has a value_changed_event() getter which returns an event firing when the value of the signal changes. Just wait for this event.
  12. What you can do is build your driver software as a shared library with a main function. In a SC_THREAD you just load the library and execute the main function. Along with this you have to implement a few utility functions (read, write, wait) which interact with the SystemC kernel or your DUT and being used by the main function (and the called functions from there). This is called host based or host compiled simulation (you may check the search engine of your choice for it). With some infrastructure it is even possible to mimic interrupt. Another option is to use some instruction set simulator (e.g. QEMU, DBT-RISE-RISCV, or some commercial alternatives) and do you driver development using a virtual prototype... Best regards
  13. There is no predefined way. You would have to have No_OF_SUBMODULES sc_signal<bool> connecting to the sc_out<bool>, one sc_signal<sc_dt::sc_uint<No_OF_SUBMODULES>> connecting to the sc_in<..>, and a SC_METHOD. The method needs to be sensitive to the bool signals, assemble the sc_uint and write it to the sc_uint signal. HTH
  14. See the answer to your other post. In a few words it describes the duration of the phase and saves a second call just to mark the end of the phase. Best regards
  15. The 10ns tells the initiator that the request phase (or address phase in some bus protocols) takes 10ns. During 110ns and 150ns simulation time the target executes the read. The 5ns in the BEGIN_RESP/END_RESP tells the target that the data/status transfer over the bus (the data phase on some bus protocols) takes 5ns. The annotated times in the return path is to save a second function call (END_REQ and END_RESP respectively) at two more simulation time points (120ns and 155ns). This way you can increase the performance of the simulation. Best regards
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