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aixeta

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  1. adder - hierarchy- output issue

    Hi Roman, I'm sorry, yes I'm new here in systemC. I had read about it from doulos and asic-world, but i have not found any explanation and example about signal and port for 2 or more derived module. Do you mind give me the simple example about it? I'm using SystemC 2.3.2 right now. Thank you.
  2. adder - hierarchy- output issue

    Thank you roman, I can understand better about elaboration and simulation from your reference. I'm realize that i cannot do a port binding from a MEtHOD, THREAD, or CTHREAD. "Port binding" that i mean is to declare a new object module like example below: void do_add4(){ sc_lv<4> tmpA = A_s.read(); A3 = tmpA[3]; A2 = tmpA[2]; A1 = tmpA[1]; A0 = tmpA[0]; sc_lv<4> tmpB = B_s.read(); B3 = tmpB[3]; B2 = tmpB[2]; B1 = tmpB[1]; B0 = tmpB[0]; fa adder1("adder1"); //This is the problem right? adder1.a(A0); adder1.b(B0); adder1.carryIn(CIN_s); adder1.sum(S0); adder1.carryOut(cout1); } SC_CTOR(add4){ cout<<endl<<"Constructing Adder 4 bit"<<endl; SC_METHOD(do_add4); } Is my understanding correct? For instance, if i have a "top" module and i want to bind with (lets say) "A" module, then "A" module should be binded/connected with "B" module. Is there any way to do the binding between "A" module and "B" module? Because i don't have any problem if that only from "top" module to "A" module, but i cannot do the binding between A and B. I want to try to do pin level code in systemC. In verilog i can do the binding like the example code below module A( A, B, C, S, CO); input[3:0] A; input[3:0] B; input CI; output CO; output[3:0] S; wire [2:0] C; B b1(A[0],B[0],CI,S[0],C[0]); B b2(A[1],B[1],C[0],S[1],C[1]); B b3(A[2],B[2],C[1],S[2],C[2]); B b4(A[3],B[3],C[2],S[3],CO); endmodule Is there any way to do like those code in systemc?
  3. adder - hierarchy- output issue

    Hi, I'm trying to make 8-bit Carry Select Adder that consist of some adder 4 bit with full bit adder. I've tried to make full bit adder and the testbench. It worked very well. The problem is, when i want to make a 4 adder, i need to split binary into array. The error that i got it was only E529 Error: (E529) insert module failed: simulation running In file: ../../../src/sysc/kernel/sc_module_registry.cpp:49 In process: ADDER4BIT.do_add4 @ 0 s The sc_main() is in the add4_tb.cpp with the testbench module. I believe, i have a problem in the add4.cpp around code below but i'm not sure what it is. void do_add4(){ cout<<endl<<"Constructing Adder 4 bit"<<endl; sc_lv<4> tmpA = A_s.read(); A0 = tmpA[0]; A1 = tmpA[1]; A2 = tmpA[2]; A3 = tmpA[3]; sc_lv<4> tmpB = B_s.read(); B0 = tmpB[0]; B1 = tmpB[1]; B2 = tmpB[2]; B3 = tmpB[3]; //Instantiate 4 BIT_ADDERs to make a 4-bit ADDER fa adder1("BitAdder1"); adder1.a(A0); adder1.b(B0); adder1.cin(CIN_s); adder1.sum(S0); adder1.cout(cout1); ... Full code attached below. add4.h add4_tb.cpp fa.h
  4. Thank you sir @StS, It worked. I can install the scv and run the example. Looking foward for the SCV upcoming release.
  5. Hi there, I have an exact same problem with Sephan, when i ran "make' command after do the config the error said like "error: cannot convert 'sc_dt::sc_bv_base::value_type {aka bool}' to 'sc_dt::sc_logic_value_t' in return { this->initialize(); return this->_get_instance()->get_bit(i); } \" I'm using centOS 7 3.10.0-693.5.2.el7.x86_64 and GCC Version gcc version 4.8.5 20150623 (Red Hat 4.8.5-16) (GCC) The scv that i used was "scv-2.0.0a-20161019 " Do you have any suggestion? here the full output making all in sis make[4]: Entering directory `/usr/local/scv-2.0.0/objdir/src/cudd/2.3.0/sis' make[4]: Nothing to be done for `all'. make[4]: Leaving directory `/usr/local/scv-2.0.0/objdir/src/cudd/2.3.0/sis' make[4]: Entering directory `/usr/local/scv-2.0.0/objdir/src/cudd/2.3.0' make[4]: Nothing to be done for `all-am'. make[4]: Leaving directory `/usr/local/scv-2.0.0/objdir/src/cudd/2.3.0' make[3]: Leaving directory `/usr/local/scv-2.0.0/objdir/src/cudd/2.3.0' make[3]: Entering directory `/usr/local/scv-2.0.0/objdir/src/cudd' make[3]: Nothing to be done for `all-am'. make[3]: Leaving directory `/usr/local/scv-2.0.0/objdir/src/cudd' make[2]: Leaving directory `/usr/local/scv-2.0.0/objdir/src/cudd' Making all in scv make[2]: Entering directory `/usr/local/scv-2.0.0/objdir/src/scv' /bin/sh ../../libtool --tag=CXX --mode=compile g++ -DHAVE_CONFIG_H -I. -I../../../src/scv -I../../config -I../../src -I../../../src -I../../../src/cudd/2.3.0/cudd -I../../../src/cudd/2.3.0/obj -I../../../src/cudd/2.3.0/util -I../../../src/cudd/2.3.0/mtr -I../../../src/cudd/2.3.0/st -I/usr/local/systemc-2.3.2/include -Wall -Wformat -O2 -g -MT libscv_la-scv_constraint.lo -MD -MP -MF .deps/libscv_la-scv_constraint.Tpo -c -o libscv_la-scv_constraint.lo `test -f 'scv_constraint.cpp' || echo '../../../src/scv/'`scv_constraint.cpp libtool: compile: g++ -DHAVE_CONFIG_H -I. -I../../../src/scv -I../../config -I../../src -I../../../src -I../../../src/cudd/2.3.0/cudd -I../../../src/cudd/2.3.0/obj -I../../../src/cudd/2.3.0/util -I../../../src/cudd/2.3.0/mtr -I../../../src/cudd/2.3.0/st -I/usr/local/systemc-2.3.2/include -Wall -Wformat -O2 -g -MT libscv_la-scv_constraint.lo -MD -MP -MF .deps/libscv_la-scv_constraint.Tpo -c ../../../src/scv/scv_constraint.cpp -fPIC -DPIC -o .libs/libscv_la-scv_constraint.o In file included from ../../../src/scv/scv_introspection.h:625:0, from ../../../src/scv/scv_constraint.h:65, from ../../../src/scv/scv_constraint.cpp:43: ../../../src/scv/_scv_introspection.h: In member function 'sc_dt::sc_logic_value_t scv_extensions<sc_dt::sc_bv_base>::get_bit(int) const': ../../../src/scv/_scv_introspection.h:552:66: error: cannot convert 'sc_dt::sc_bv_base::value_type {aka bool}' to 'sc_dt::sc_logic_value_t' in return { this->initialize(); return this->_get_instance()->get_bit(i); } \ ^ ../../../src/scv/_scv_introspection.h:573:3: note: in expansion of macro '_SCV_BIT_BASE_INTERFACE' _SCV_BIT_BASE_INTERFACE(type_name) \ ^ ../../../src/scv/_scv_introspection.h:577:1: note: in expansion of macro '_SCV_TAG_FINAL_COMPONENT' _SCV_TAG_FINAL_COMPONENT(sc_bv_base); ^ make[2]: *** [libscv_la-scv_constraint.lo] Error 1 make[2]: Leaving directory `/usr/local/scv-2.0.0/objdir/src/scv' make[1]: *** [all-recursive] Error 1 make[1]: Leaving directory `/usr/local/scv-2.0.0/objdir/src' make: *** [all-recursive] Error 1
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