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enchanter

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  1. UVM-SystemC 1.0-beta1 Released

    Any plan to fix this build error on Mac OS? libtool: link: ar cru .libs/libmacros.a ar: no archive members specified usage: ar -d [-TLsv] archive file ... ar -m [-TLsv] archive file ... ar -m [-abiTLsv] position archive file ... ar -p [-TLsv] archive [file ...] ar -q [-cTLsv] archive file ... ar -r [-cuTLsv] archive file ... ar -r [-abciuTLsv] position archive file ... ar -t [-TLsv] archive [file ...] ar -x [-ouTLsv] archive [file ...] make[4]: [libmacros.la] Error 1 (ignored)
  2. UVM-SystemC 1.0-beta1 Released

    In installed uvm-systemc.pc file, it sets Libs to "-luvm". Should it be "-luvm-systemc"?
  3. Saw the UVM-SystemC-1.0-beta1 download link, try to install it, but according to the INSTALL file, I can't find "configure" in the package. How could I install it?
  4. That is a great news. Will this time add some examples about how to driving clock/reset signal as I ask in this post?
  5. Thanks for the help. I did some digging too and I also thought it is becaused by the clock events. So I tried to use the set_timeout on that example which should finished in 100 NS. When I set the timeout to 30 NS, it killed the simulation at 30 NS as expected. But when I set it to 200 NS, the simulation will not finish. I haven't figure out why.
  6. For UVM, it should not start the simulation by directly call sc_start() and sc_stop().
  7. I played with scoreboard/basic example from uvm-systemc package, it finished simulation automatically: But when I try to add clock signal to the DUT and sc_main as below: dut.h #ifndef DUT_H_ #define DUT_H_ #include <systemc> class dut : public sc_core::sc_module { public: sc_core::sc_in<int> in; sc_core::sc_in<bool> clk; sc_core::sc_out<int> out; void func() { int val; val = in.read(); std::cout << sc_core::sc_time_stamp() << ": " << name() << " received value " << val << std::endl; std::cout << sc_core::sc_time_stamp() << ": " << name() << " send value " << val+1 << std::endl; out.write(val+1); } SC_CTOR(dut) : in("in"), out("out") { SC_METHOD(func); sensitive << clk.pos(); } }; #endif /* DUT_H_ */ sc_main.cpp #include <systemc> #include <uvm> #include "testbench.h" #include "dut.h" #include "vip_if.h" int sc_main(int, char*[]) { // instantiate the DUT sc_core::sc_time CLK_PERIOD(10, sc_core::SC_NS); sc_core::sc_clock clk("clk", CLK_PERIOD, 0.5); dut* my_dut = new dut("my_dut"); testbench* tb = new testbench("tb"); //uvm_config_db_options::turn_on_tracing(); vip_if* dut_if_in = new vip_if(); vip_if* dut_if_out = new vip_if(); uvm::uvm_config_db<vip_if*>::set(0, "tb.agent1.*", "vif", dut_if_in); uvm::uvm_config_db<vip_if*>::set(0, "tb.agent2.*", "vif", dut_if_out); my_dut->clk(clk); my_dut->in(dut_if_in->sig_data); my_dut->out(dut_if_out->sig_data); uvm::run_test(); return 0; } The simulation will not stop and I have to kill the process. scoreboard_basic.tar.gz2
  8. I can't find any example in the uvm-systemc preview package which DUT has clock and reset signals. I tried to create clock with sc_clock in sc_main and connected it my dut's clock signal. But it looks the simulation will never finish. So would someone let me know what's the right way to handle the clock and reset signals?
  9. The SystemC 2.3.2 has been release, does anyone work on make it support the new version? And also supports modern C++ (11, 14, 17)?
  10. I am learning the TLM example at_4_phase in the SystemC 2.3.1 package. But I don't know why there are 16 WRITE commands are generated by the traffic_generator? From my understanding, the m_transaction_queue is enqueue-ed twice. So I think it should only generate 2 commands then the queue should be empty. Why it generate 16 WRITE and 16 READ commands instread?
  11. b-transport interface

    What's the local time for target when it received b_transport call, 1000ns or 1010ns? the target executes b_transport(tx, t), in which, t should be 100ns or 110ns?
  12. Read some examples about TLM and find the calls about "b_transport" with delay. But all of them just ignore it in the implementation. The sc_time_stamp() from both initiator and target are the same value in the print message. So I am not sure what's the "delay" should be used? I should wait for "delay" time to start processing request or process the request as soon as possible with my "processing delay" then wait for "delay" time or something else? Thanks.
  13. I try to find a simple template which can compile both the example code and my own (in the future). The reason why I want one for the example code is I may try to do some modification on the example code to try things, it is too hard for me to tweak the original Makefile in the package. About the command line, I think that is not a good idea. There's so many flags you have to remember for just compile a single file. I consider Makefile is more productive.
  14. I start to learn SystemC and SCV. But I don't have much experience on complex Makefile as the one provided in the install package by SCV. It is too hard for me to understand who the files are really compiled. I am not sure if any one can provide simple Makefile template (Only Linux platform is OK). Thanks.
  15. Most time, I expect random value to test DUT. But sometimes I hope to get some simple patterns to test my verification environment, for example I expect the size is random but the value are constant or in/decreasing etc. If I use foreach, could I turn it off when I expect random value?
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