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Everything posted by sm2345110

  1. SystemVerilog Interface packaging

    interface iface(); logic a; logic b; modport mport(input a, output b); endinterface module mod ( iface.mport iface_array [3:0] ); ... endmodule module top (); iface top_iface_array [3:0] (); mod mod_inst(.iface_array(top_iface_array)); ... endmodule Click Here for more Details :- System Verilog Program All the Best :)
  2. System Verilog, UVM training online

    I think system Verilog tutorials is the best option for the learning quickly. Thanks for the sharing ...
  3. Check the System configuration, for learn the Embedded system you can choose the tutorials, and the best thing is community channel. Regards, Sharon Maxwell CETPA Infotech Pvt Ltd.
  4. Sorry , No idea about i would like to say concern with the experienced person. who have at least 5 to 10-year experience Embedded system. Sharon maxwell CETPA Infotech Pvt Ltd
  5. c4brian, I agree with you, but plz tell me what is the resbery-pi tool for the Verilog , also included the tools name .? Awaiting for your positive response. Regards, Sharon Maxwell